From patchwork Fri Sep 2 08:32:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 12963826 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 13473C54EE9 for ; Fri, 2 Sep 2022 08:33:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=Rrlow1Ly9+don2bj7O3qyTIBYyO0dmd6qlKWjeOctJA=; b=lZ4cIKqL7LPkUO TDF96F0t6WKEgVPOdROiybXcLZCeMDiAQM6siGGXTN58V6rOB/+ML8IJFs9fzCkLbz0Pxa0lOeVvv 77udQYtCMJj8WSjhuoWdqkbXkfBPm+wrh9FE/v94ZD+D2/CIe8EdaKd2CRljrR3d0Fz0KmTC5B6Rw o+hIh1aVnqa3gnqFLTXJsGf/5eHHhe+Im83pcj5C1AUoucZ3uxW+CK4EyW51Ob4ciuhnHeIdkLJ9Q sSvtJDbQDjPuAOjctJ83rgpqussybesPF3BmdPr1AE6M4qW5x53ji8hykrNSqeDJoyGHgP4CjRl16 9i5hZMZNxu4E6is3GpMQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oU268-001tUs-VY; Fri, 02 Sep 2022 08:32:21 +0000 Received: from relay6-d.mail.gandi.net ([217.70.183.198]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oU265-001tOu-40 for linux-arm-kernel@lists.infradead.org; Fri, 02 Sep 2022 08:32:19 +0000 Received: (Authenticated sender: maxime.chevallier@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 2C910C000D; Fri, 2 Sep 2022 08:32:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1662107532; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=ss5Njgejn8S6zVNK73ckz7rzGoGVEnyMlp4C2rUR5LA=; b=QlxmRcMA5f9gisCI/Ub/b/DGVscsrkjyLmgqG3LNr86o511yrfJ5lFCqzhMdBkBTsUSE+U xausUaEsLCqsMyFcVS8EV5Buiwsk8VTk+wrjzTJOqUPIn0fbcoFVZxf0T/NUjf5LGa73Hj 1KxRx/ekXR6y8Xbeei/vLzfr9Jhxt36dA6EHarVkDjL/6ApswuSbhRWup1uJJuUPDkCIXz G36cN6sheETfMOL/b5Bhfld1oQbK3PBp7W6SUAtSDL4K2xW7y7gg20zz1ltawk7Q+luWkO iDgf0Fdremy7ModK/enB/rywmKwSZ61A0dVyVs1BKtA8EQwumbRtAPs4sZJ/Qg== From: Maxime Chevallier To: davem@davemloft.net, Rob Herring Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com, Andrew Lunn , Jakub Kicinski , Eric Dumazet , Paolo Abeni , Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , devicetree@vger.kernel.org Subject: [PATCH net-next v4 0/5] net: altera: tse: phylink conversion Date: Fri, 2 Sep 2022 10:32:00 +0200 Message-Id: <20220902083205.483438-1-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220902_013217_579374_2A0F3033 X-CRM114-Status: GOOD ( 17.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is V4 of a series converting the Altera TSE driver to phylink, introducing a new PCS driver along the way. The Altera TSE can be built with a SGMII/1000BaseX PCS, allowing to use SFP ports with this MAC, which is the end goal of adding phylink support and a proper PCS driver. The PCS itself can either be mapped in the MAC's register space, in that case, it's accessed through 32 bits registers, with the higher 16 bits always 0. Alternatively, it can sit on its own register space, exposing 16 bits registers, some of which ressemble the standard PHY registers. To tackle that rework, several things needs updating, starting by the DT binding, since we add support for a new register range for the PCS. Hence, the first patch of the series is a conversion to YAML of the existing binding. Then, patch 2 does a bit of simple cleanup to the TSE driver, using nice reverse xmas tree definitions. Patch 3 adds the actual PCS driver, as a standalone driver. Some future series will then reuse that PCS driver from the dwmac-socfpga driver, which implements support for this exact PCS too, allowing to share the code nicely. Patch 4 is then a phylink conversion of the altera_tse driver, to use this new PCS driver. Finally, patch 5 updates the newly converted DT binding to support the pcs register range. This series contains bits and pieces for this conversion, please tell me if you want me to send it as individual patches. Thanks, Maxime V4 Changes: - Add missing MODULE_* macros to the TSE PCS driver V3 Changes: - YAML binding conversion changes and PCS addition changes thanks to Krzysztof's reviews V2 Changes : - Fixed the binding after the YAML conversion - Added a pcs_validate() callback - Introduced a comment to justify a soft reset for the PCS Maxime Chevallier (5): dt-bindings: net: Convert Altera TSE bindings to yaml net: altera: tse: cosmetic change to use reverse xmas tree ordering net: pcs: add new PCS driver for altera TSE PCS net: altera: tse: convert to phylink dt-bindings: net: altera: tse: add an optional pcs register range .../devicetree/bindings/net/altera_tse.txt | 113 ----- .../devicetree/bindings/net/altr,tse.yaml | 168 +++++++ MAINTAINERS | 7 + drivers/net/ethernet/altera/Kconfig | 2 + drivers/net/ethernet/altera/altera_tse.h | 19 +- .../net/ethernet/altera/altera_tse_ethtool.c | 22 +- drivers/net/ethernet/altera/altera_tse_main.c | 453 +++++------------- drivers/net/pcs/Kconfig | 6 + drivers/net/pcs/Makefile | 1 + drivers/net/pcs/pcs-altera-tse.c | 175 +++++++ include/linux/pcs-altera-tse.h | 17 + 11 files changed, 536 insertions(+), 447 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/altera_tse.txt create mode 100644 Documentation/devicetree/bindings/net/altr,tse.yaml create mode 100644 drivers/net/pcs/pcs-altera-tse.c create mode 100644 include/linux/pcs-altera-tse.h