From patchwork Tue Sep 6 13:54:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiu Moga X-Patchwork-Id: 12967653 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A1EF2ECAAA1 for ; Tue, 6 Sep 2022 14:43:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=NncoBHNQh3WOojM0LQJP3wRDvRw6YSDIwngon15d3rg=; b=LtS310ePv9Ud1g xQ8kdM1JU8QgEPMI7SYfZzdsieNAzXyDtVVGNqPDJs26EuT7iI9pp70zcBr582n353AQ+d4dLInEV Df6xZXKybNoR1GHlUnMAH6B4sxipajdl8lFElAkN2AFGAflZQS0OiUZSt2w21BR9vrFUC/IK0YCd2 qqJglRy6RyfoyMYgxwmnsyhTBR+JqnCULLyyhkNLb++/5V8M/Lzm/IYXLoItu+K/40EJaNOyyIPeJ Hx0u2Y6hSJu1IL+a3hUsLEQa9Sof5TrUQmq5rk/aKJNCHEldA618RSXsvN2xR2u/McOBtRPI0Ce6u IgJAHN8CEEsXJVCup9bg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVZlY-00EOlb-Ho; Tue, 06 Sep 2022 14:41:29 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oVZ4B-00E3sJ-38 for linux-arm-kernel@lists.infradead.org; Tue, 06 Sep 2022 13:56:41 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1662472598; x=1694008598; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=U3MsuWSa5/ANNU0IferkV6aMPYqhSk2HZNq+UUntvlc=; b=2BC1xxz7r7VfkEtrqTGJFrjofFjAM6SI9L38liq0Q1sNNwivFtv8ppWD IvoIZmJ7HO9kMkhv0XXD20r8Il6w+dbXmkqhjGq8toUOdQQL01/dQWXhX vJCaTLjGkCWLQB34IXEhGkd+H8K/0X6JbZIb4brC6dQUxU5VrS9vhmqor h/V4fqtpKN7OCEYmfOuEMIglNpyo45NKqQahwNeiyoPn7fMtQxTU2bfY4 ZCKdgU9RVZfFQJShocuoJN10k+EiThZ3ZcFecnh3educeQAejlkrMcB/p U/n/aOCgmkQ8UaqqODLpR8g8R9rus9I26kQ4R5O7ipBSwaYBpcRjbfbz9 Q==; X-IronPort-AV: E=Sophos;i="5.93,294,1654585200"; d="scan'208";a="189613793" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 Sep 2022 06:56:33 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Tue, 6 Sep 2022 06:56:33 -0700 Received: from ROB-ULT-M68701.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Tue, 6 Sep 2022 06:56:28 -0700 From: Sergiu Moga To: , , , , , , , , , , , , , , , , CC: , , , , , Subject: [PATCH v2 00/13] Make atmel serial driver aware of GCLK Date: Tue, 6 Sep 2022 16:54:59 +0300 Message-ID: <20220906135511.144725-1-sergiu.moga@microchip.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220906_065639_185164_57D1B599 X-CRM114-Status: GOOD ( 19.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series of patches introduces the GCLK as a potential clock source for the baudrate generator of UART on sama5d2 SoCs. Unlike the serial mode of the USART offered by FLEXCOM, the UART does not provide a fractional part that can be added to the clock divisor to obtain a more accurate result, which greatly decreases the flexibility available for producing a higher variety of baudrates. Now, with the last patch of the series, the driver will check for a GCLK in the DT. If provided, whenever `atmel_set_termios` is called, unless there is a fractional part, the driver will compare the error rate between the desired baudrate and the actual baudrate obtained through each of the available clock sources and will choose the clock source with the lowest error rate. While at it, convert the DT binding for UART/USART to json-schema, update the FLEXCOM binding to reference the new UART/USART binding (while differentiating between the SPI of USART and the SPI of FLEXCOM) and do some small DT related fixups. The DT bindings related patches of this patch series depend on this patch series converting atmel-flexcom bindings to json-schema: https://lore.kernel.org/all/20220708115619.254073-1-kavyasree.kotagiri@microchip.com/ v1 -> v2: - [PATCH 3] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding: - use full schema paths - [PATCH 5] dt-bindings: serial: atmel,at91-usart: convert to json-schema - only do what the commit says, split the addition of other compatibles (PATCH 6) and properties (PATCH 13) in other patches - remove unnecessary "|"'s - mention header in `atmel,usart-mode`'s description - place `if:` under `allOf:` - respect order of spi0's DT properties: compatible, then reg then the reset of properties - two new baudrate clock source related patches: [PATCH 9] tty: serial: atmel: Add definition for GCLK as baudrate source clock + [PATCH 10] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register: - v1's bitfield definition of GCLK was wrong, so add two more patches: - one for the definition of GCLK of USART IP's - one for the definition of BRSRCCK bitmask and its bitfields for UART IP's - a new cleanup related patch that introduces a new struct atmel_uart_port field: [PATCH 11] tty: serial: atmel: Only divide Clock Divisor if the IP is USART: - this ensures a division by 8 which is unnecessary and unappliable to UART IP's is only done for USART IP's - four new patches regarding DT fixes and a SPI binding update that I came upon: [PATCH 1] spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties [PATCH 2] ARM: dts: at91: sama7g5: Swap rx and tx for spi11 [PATCH 4] ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1 [PATCH 6] dt-bindings: serial: atmel,at91-usart: Highlight SAM9X60 incremental - [PATCH 12] tty: serial: atmel: Make the driver aware of the existence of GCLK - take into account the different placement of the baudrate clock source into the IP's Mode Register (USART vs UART) - don't check for atmel_port->gclk != NULL - use clk_round_rate instead of clk_set_rate + clk_get_rate - remove clk_disable_unprepare from the end of the probe method Sergiu Moga (13): spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties ARM: dts: at91: sama7g5: Swap rx and tx for spi11 dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1 dt-bindings: serial: atmel,at91-usart: convert to json-schema dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9x60 dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding tty: serial: atmel: Define GCLK as USART baudrate source clock tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register tty: serial: atmel: Only divide Clock Divisor if the IP is USART clk: at91: sama5d2: Add Generic Clocks for UART/USART tty: serial: atmel: Make the driver aware of the existence of GCLK dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock .../bindings/mfd/atmel,sama5d2-flexcom.yaml | 19 +- .../devicetree/bindings/mfd/atmel-usart.txt | 98 --------- .../bindings/serial/atmel,at91-usart.yaml | 191 ++++++++++++++++++ .../bindings/spi/atmel,at91rm9200-spi.yaml | 10 + arch/arm/boot/dts/at91-sam9x60ek.dts | 2 +- arch/arm/boot/dts/sama7g5.dtsi | 6 +- drivers/clk/at91/sama5d2.c | 10 + drivers/tty/serial/atmel_serial.c | 65 +++++- drivers/tty/serial/atmel_serial.h | 4 + 9 files changed, 295 insertions(+), 110 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-usart.txt create mode 100644 Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml