From patchwork Tue Oct 18 08:43:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13010145 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 75DE5C4332F for ; Tue, 18 Oct 2022 08:44:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=FJKE5v8FTS2zRU0unGWYwDDjW7qzVmXfGfhaLo+n2W0=; b=UY7VnL4xAQFghm JFqpvTAtmx8a5UPx/ycAhErIY/4ryvrlVSHJcRwmYTpPFa0UHPdpg3wCZOjCeqI4AT2ALwLcG+90g adp3Zto1YJ0vOypoerEvnhpS2yzNkTy4feFP6JigIfrR3/0pe0GB01WbWMgh+cnz3eie0fjn8GF93 s4EkeybpsGacWDK/9zhGIu4XZWINOVxrz96VUBqJm1vxNkSxprz+VHoxLTNcLbqA7odsO/sEz9OJW kxRAttKWBiu0Nv1aaRqumISumcDgjXlUqrpYCkTTlNDddmh1CgOjtahAY0TIoSFDZcOyhEHWJeq9t xQ5lfZ1Cf+PdzMkexDCw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1okiCX-004R74-5r; Tue, 18 Oct 2022 08:43:53 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1okiCT-004R5Z-Ng; Tue, 18 Oct 2022 08:43:51 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29I8hbZ3040046; Tue, 18 Oct 2022 03:43:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666082617; bh=QmDZI3TBEjPeKNZilh+9aFh3Fur9k+LaiSQR5pUzem8=; h=From:To:CC:Subject:Date; b=r/9k2rtbuN3htvghYmuj8nXP4urgbY4jvhXNaktKO3OG21ova2uWLHMDeu1p9l8q4 WrqcDMcJ8rEjsyv+KwhFpLm/3taZDC85pCpuieH/1kyKkq129mEYS9bmsqdhsrrXv6 Y59TBDTEsfkIfiowWzpG6jBIFzrX0qzz/8gzBe7E= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29I8hbnf022532 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 18 Oct 2022 03:43:37 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 18 Oct 2022 03:43:37 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 18 Oct 2022 03:43:37 -0500 Received: from uda0492258.dhcp.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29I8hXCP076871; Tue, 18 Oct 2022 03:43:34 -0500 From: Siddharth Vadapalli To: , , , , , , , CC: , , , , Subject: [PATCH v2 0/3] Add support to PHY GMII SEL for J721e CPSW9G QSGMII Date: Tue, 18 Oct 2022 14:13:30 +0530 Message-ID: <20221018084333.149790-1-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221018_014349_883184_0AEC68A3 X-CRM114-Status: GOOD ( 11.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add compatible for J721e CPSW9G, which contains 8 external ports and 1 internal host port. Update existing approach of using compatible to differentiate between devices that support QSGMII mode and those that don't. The new approach involves storing the number of qsgmii main ports for the device in the num_qsgmii_main_ports member of the "struct phy_gmii_sel_soc_data". This approach makes it scalable for newer devices. ========= Changelog ========= v1 -> v2: 1. Drop all patches corresponding to SGMII mode. This is done since I do not have a method to test SGMII in the standard mode which uses an SGMII PHY. The previous series used SGMII in a fixed-link mode, bypassing the SGMII PHY. I will post the SGMII patches in a future series after testing them. 2. Update description for the property "ti,qsgmii-main-ports", to describe it in a unified way across the compatibles. 3. Add minItems, maxItems, and items at the top, where the property "ti,qsgmii-main-ports" is first defined. Modify them later appropriately, based on the compatible. 4. Update the method to fetch the property "ti,qsgmii-main-ports" from the device-tree, to make it scalable. 5. Use dev_err() when the value(s) provided in the device-tree for the property "ti,qsgmii-main-ports" is/are invalid. v1: https://lore.kernel.org/r/20220914093911.187764-1-s-vadapalli@ti.com/ Siddharth Vadapalli (3): dt-bindings: phy: ti: phy-gmii-sel: Add bindings for J721e phy: ti: gmii-sel: Update methods for fetching and using qsgmii main port phy: ti: gmii-sel: Add support for CPSW9G GMII SEL in J721e .../bindings/phy/ti,phy-gmii-sel.yaml | 48 +++++++++++++++---- drivers/phy/ti/phy-gmii-sel.c | 42 +++++++++++++--- 2 files changed, 75 insertions(+), 15 deletions(-)