From patchwork Tue Nov 1 14:16:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 13026954 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51614C433FE for ; Tue, 1 Nov 2022 14:18:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=NZ4GSzzV9K5elU97L2V3RFeiJ7QhzMJJdByNxwANcPg=; b=s6421DZXJDYy6f zspci0dIhwX9h4dGFqRhxAPetf15z8ItjXcLMi0/bQZWBrZvv9yQgq6sNfIDioXuaDUPPDjhVNjeK x4H64dTEMXFM+ug5QpPFhB99tlpfIoeF2nokqrOWECMpFTrzkypcNdgR31x05dhTUn+TfyFzvy8uE aIFgWw74rdF3QxB87YZVVnIktsTftuaFD0SUMgo8BpXztWSyGJguO4Oi2fp8a1CCKuNGRQhRMeQes 19z8lKVWdMDp4K4meLr2LMq0RKln7+qVq0yabgcXulJRF0p7xzVdXuZqAh/aGcQzbm4n19wsnGWI2 MkcN8b3Swf0CvGFto2eA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ops4q-005Q3U-Em; Tue, 01 Nov 2022 14:17:16 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ops4m-005PzR-Pw for linux-arm-kernel@lists.infradead.org; Tue, 01 Nov 2022 14:17:14 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C34571FB; Tue, 1 Nov 2022 07:17:12 -0700 (PDT) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.197.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2E5B73F703; Tue, 1 Nov 2022 07:17:05 -0700 (PDT) From: Andre Przywara To: Jernej Skrabec , Samuel Holland , Chen-Yu Tsai , Rob Herring , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Icenowy Zheng Subject: [PATCH 0/9] ARM: dts: suniv: F1C100s: add more peripherals Date: Tue, 1 Nov 2022 14:16:49 +0000 Message-Id: <20221101141658.3631342-1-andre.przywara@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221101_071712_922045_82E2DC64 X-CRM114-Status: GOOD ( 13.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Allwinner F1C100s series of SoCs shares many peripherals with other Allwinner SoCs. Since they are compatible, we can use the existing drivers, and just need to enable the devices in the DT. This series adds the I2C controllers, the PWM device, the CIR (infrared) device and the LRADC (aka. KEYADC, low res ADC) to the F1C100s .dtsi, so boards can just use them by setting 'status = "okay";'. The only thing missing driver-wise is the IR mod clock, which was not modeled in our CCU driver. Patch 5/9 fixes that. For every device there is one patch that adds the new compatible string to the DT binding, and another patch to add the DT node. This has been tested with a Lctech Pi F1C200s board, by: - Connecting an LED to PE6, and configuring this as the PWM pin in the DT. Doing a sweep on /sys/class/pwm/pwm1/duty_cycle made the LED fade out. - Configuring PD0/PD12 as I2C0, and letting i2c-detect find the on-board NS2009 I2C chip. - Connecting two resistors to the "ADC" pin, and configuring them as two buttons in the DT. /dev/input/event0 properly reported button presses. - Connecting an infrared receiver to PE11, configured as CIR. ir-keytable reported key presses on a remote control. All those (basic) tests were successful, and prove that the peripherals do work and are compatible. Please have a look and test on your hardware, if possible. Cheers, Andre Andre Przywara (9): dt-bindings: pwm: allwinner,sun4i-a10: Add F1C100s compatible ARM: dts: suniv: f1c100s: add PWM node dt-bindings: i2c: mv64xxx: Add F1C100s compatible string ARM: dts: suniv: f1c100s: add I2C DT nodes clk: sunxi-ng: f1c100s: Add IR mod clock dt-bindings: media: IR: Add F1C100s IR compatible string ARM: dts: suniv: f1c100s: add CIR DT node dt-bindings: input: sun4i-lradc-keys: Add F1C100s compatible ARM: dts: suniv: f1c100s: add LRADC node .../bindings/i2c/marvell,mv64xxx-i2c.yaml | 1 + .../input/allwinner,sun4i-a10-lradc-keys.yaml | 4 +- .../media/allwinner,sun4i-a10-ir.yaml | 1 + .../bindings/pwm/allwinner,sun4i-a10-pwm.yaml | 4 +- arch/arm/boot/dts/suniv-f1c100s.dtsi | 78 +++++++++++++++++++ drivers/clk/sunxi-ng/ccu-suniv-f1c100s.c | 11 ++- drivers/clk/sunxi-ng/ccu-suniv-f1c100s.h | 2 +- include/dt-bindings/clock/suniv-ccu-f1c100s.h | 2 + 8 files changed, 99 insertions(+), 4 deletions(-)