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[v3,0/2] Support new features to the SPEAr600

Message ID 20221115135814.214388-1-kory.maincent@bootlin.com (mailing list archive)
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Series Support new features to the SPEAr600 | expand

Message

Kory Maincent Nov. 15, 2022, 1:58 p.m. UTC 
From: Kory Maincent <kory.maincent@bootlin.com>

This patches series adds two features of the SPEAr600 SOC:

- Enable the display controller

- Enable the SPI buses using the SSP controller

Changes in v2:
- Keep the I2C_CONFIG in the spear6xx_defconfig while enabling DRM.
- Send cover letter which was not sent in v1 due to a mistake in my git
  mail config.

The arm patches have been merged thanks to Arnd. Could you deal with the
clock patches to merged them through the clock tree?

Kory Maincent (2):
  clk: spear: Fix CLCD clock definition on SPEAr600
  clk: spear: Fix SSP clock definition on SPEAr600

 drivers/clk/spear/spear6xx_clock.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)