| Message ID | 20221201084229.3464449-1-wenst@chromium.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | arm64: dts: mediatek: Fix systimer clock description | expand |
On 01/12/2022 09:42, Chen-Yu Tsai wrote: > Hi, > > This series fixes the clock description for the systimer block. The > systimer is fed by the main 26 MHz oscillator, and internally divides > the clock, normally by 2. > > However this ended up being modeled in various incorrect ways, such as > the clock divider being in the TOPCKGEN block, or as a standalone 13 MHz > oscillator. > > This series fixes the description of the systimer clock input in an ABI > compatible way, i.e. the clock rate of the input clock remains the same > at 13 MHz. The clock is now modeled as a divide-by-2 fixed factor clock > being fed by the main oscillator. > > An added benefit is that in Linux the systimer no longer requires the > main SoC clk driver to do an early init dance. > > Please have a look. > > The next step would be to fix up the systimer driver in a backward > compatible way and have it read the divider value from hardware. > Whole series applied, thanks! > > Regards > ChenYu > > Chen-Yu Tsai (4): > arm64: dts: mediatek: mt8183: Fix systimer 13 MHz clock description > arm64: dts: mediatek: mt8192: Fix systimer 13 MHz clock description > arm64: dts: mediatek: mt8195: Fix systimer 13 MHz clock description > arm64: dts: mediatek: mt8186: Fix systimer 13 MHz clock description > > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 12 ++++++++++-- > arch/arm64/boot/dts/mediatek/mt8186.dtsi | 8 +++++--- > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++-- > arch/arm64/boot/dts/mediatek/mt8195.dtsi | 11 ++++++++++- > 4 files changed, 35 insertions(+), 8 deletions(-) >