mbox series

[v7,00/15] coresight: Add new API to allocate trace source ID values

Message ID 20230116124928.5440-1-mike.leach@linaro.org (mailing list archive)
Headers show
Series coresight: Add new API to allocate trace source ID values | expand

Message

Mike Leach Jan. 16, 2023, 12:49 p.m. UTC
The current method for allocating trace source ID values to sources is
to use a fixed algorithm for CPU based sources of (cpu_num * 2 + 0x10).
The STM is allocated ID 0x1.

This fixed algorithm is used in both the CoreSight driver code, and by
perf when writing the trace metadata in the AUXTRACE_INFO record.

The method needs replacing as currently:-
1. It is inefficient in using available IDs.
2. Does not scale to larger systems with many cores and the algorithm
has no limits so will generate invalid trace IDs for cpu number > 44.

Additionally requirements to allocate additional system IDs on some
systems have been seen.

This patch set  introduces an API that allows the allocation of trace IDs
in a dynamic manner.

Architecturally reserved IDs are never allocated, and the system is
limited to allocating only valid IDs.

Each of the current trace sources ETM3.x, ETM4.x and STM is updated to use
the new API.

For the ETMx.x devices IDs are allocated on certain events
a) When using sysfs, an ID will be allocated on hardware enable, or a read of
sysfs TRCTRACEID register and freed when the sysfs reset is written.

b) When using perf, ID is allocated on during setup AUX event, and freed on
event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
The ID allocator is notified when perf sessions start and stop
so CPU based IDs are kept constant throughout any perf session.


Note: This patchset breaks some backward compatibility for perf record and
perf report.

The version of the AUXTRACE_INFO has been updated to reflect the fact that
the trace source IDs are generated differently. This will
mean older versions of perf report cannot decode the newer file.

Appies to coresight/next

Changes since v6:
1) Export perf_report_aux_output_id() Acked by Peter,
2) Update to ETMv3 docs requested by suzuki
3) rebased and re-tested on coresight/next (6.2-rc2)

Changes since v5: (requested by suzuki)
1) Prefer odd ID values for system IDs to avoid overlap with legacy CPU IDs
2) Some style changes

Changes since v4:
1) update to ensure that compiling after each individual patch added still
works - ie. git bisect not broken through the patchset..

2) Revision to some of the now redundant code in cs-etm (James)

3) Comments and other minor fixes requested by Suzuki.

Changes since v3:
1) Fixed aarch32 build error in ETM3.x driver.
Reported-by: kernel test robot <lkp@intel.com>

Changes since v2:
1) Improved backward compatibility: (requested by James)

Using the new version of perf on an old kernel will generate a usable file
legacy metadata values are set by the new perf and will be used if mew
ID packets are not present in the file.

Using an older version of perf / simpleperf on an updated kernel may still
work. The trace ID allocator has been updated to use the legacy ID values
where possible, so generated file and used trace IDs will match up to the
point where the legacy algorithm is broken anyway.

2) Various changes to the ID allocator and ID packet format.
(suggested by Suzuki)

3) per CPU ID info in allocator now stored as atomic type to allow a passive read
without taking the allocator spinlock. perf flow now allocates and releases ID
values in setup_aux / free_event. Device enable and event enable use the passive
read to set the allocated values. This simplifies the locking mechanisms on the
perf run and fixes issues that arose with locking dependencies.

Changes since v1:
(after feedback & discussion with Mathieu & Suzuki).

1) API has changed. The global trace ID map is managed internally, so it
is no longer passed in to the API functions.

2) perf record does not use sysfs to find the trace IDs. These are now
output as AUX_OUTPUT_HW_ID events. The drivers, perf record, and perf report
have been updated accordingly to generate and handle these events.

Mike Leach (15):
  coresight: trace-id: Add API to dynamically assign Trace ID values
  coresight: Remove obsolete Trace ID unniqueness checks
  coresight: perf: traceid: Add perf ID allocation and notifiers
  coresight: stm: Update STM driver to use Trace ID API
  coresight: etm4x: Update ETM4 driver to use Trace ID API
  coresight: etm3x: Update ETM3 driver to use Trace ID API
  coresight: etmX.X: stm: Remove trace_id() callback
  coresight: trace id: Remove legacy get trace ID function.
  perf: cs-etm: Move mapping of Trace ID and cpu into helper function
  perf: cs-etm: Update record event to use new Trace ID protocol
  kernel: events: Export perf_report_aux_output_id()
  perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
  coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
  coresight: trace-id: Add debug & test macros to Trace ID allocation
  coresight: etm3x: docs: Alter sysfs documentation for trace id updates

 .../testing/sysfs-bus-coresight-devices-etm3x |   2 +-
 drivers/hwtracing/coresight/Makefile          |   2 +-
 drivers/hwtracing/coresight/coresight-core.c  |  45 ---
 .../hwtracing/coresight/coresight-etm-perf.c  |  23 ++
 drivers/hwtracing/coresight/coresight-etm.h   |   3 +-
 .../coresight/coresight-etm3x-core.c          |  93 +++--
 .../coresight/coresight-etm3x-sysfs.c         |  27 +-
 .../coresight/coresight-etm4x-core.c          |  73 +++-
 .../coresight/coresight-etm4x-sysfs.c         |  27 +-
 drivers/hwtracing/coresight/coresight-etm4x.h |   3 +
 drivers/hwtracing/coresight/coresight-stm.c   |  49 +--
 .../hwtracing/coresight/coresight-trace-id.c  | 298 ++++++++++++++++
 .../hwtracing/coresight/coresight-trace-id.h  | 156 +++++++++
 include/linux/coresight-pmu.h                 |  34 +-
 include/linux/coresight.h                     |   3 -
 kernel/events/core.c                          |   1 +
 tools/include/linux/coresight-pmu.h           |  48 ++-
 tools/perf/arch/arm/util/cs-etm.c             |  21 +-
 .../perf/util/cs-etm-decoder/cs-etm-decoder.c |   7 +
 tools/perf/util/cs-etm.c                      | 325 +++++++++++++++---
 tools/perf/util/cs-etm.h                      |  14 +-
 21 files changed, 1024 insertions(+), 230 deletions(-)
 create mode 100644 drivers/hwtracing/coresight/coresight-trace-id.c
 create mode 100644 drivers/hwtracing/coresight/coresight-trace-id.h

Comments

Suzuki K Poulose Jan. 19, 2023, noon UTC | #1
Hi Arnaldo,

On 16/01/2023 12:49, Mike Leach wrote:
> The current method for allocating trace source ID values to sources is
> to use a fixed algorithm for CPU based sources of (cpu_num * 2 + 0x10).
> The STM is allocated ID 0x1.
> 
> This fixed algorithm is used in both the CoreSight driver code, and by
> perf when writing the trace metadata in the AUXTRACE_INFO record.
> 
> The method needs replacing as currently:-
> 1. It is inefficient in using available IDs.
> 2. Does not scale to larger systems with many cores and the algorithm
> has no limits so will generate invalid trace IDs for cpu number > 44.
> 
> Additionally requirements to allocate additional system IDs on some
> systems have been seen.
> 
> This patch set  introduces an API that allows the allocation of trace IDs
> in a dynamic manner.
> 
> Architecturally reserved IDs are never allocated, and the system is
> limited to allocating only valid IDs.
> 
> Each of the current trace sources ETM3.x, ETM4.x and STM is updated to use
> the new API.
> 
> For the ETMx.x devices IDs are allocated on certain events
> a) When using sysfs, an ID will be allocated on hardware enable, or a read of
> sysfs TRCTRACEID register and freed when the sysfs reset is written.
> 
> b) When using perf, ID is allocated on during setup AUX event, and freed on
> event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
> The ID allocator is notified when perf sessions start and stop
> so CPU based IDs are kept constant throughout any perf session.
> 
> 
> Note: This patchset breaks some backward compatibility for perf record and
> perf report.
> 
> The version of the AUXTRACE_INFO has been updated to reflect the fact that
> the trace source IDs are generated differently. This will
> mean older versions of perf report cannot decode the newer file.
> 
> Appies to coresight/next
> 
> Changes since v6:
> 1) Export perf_report_aux_output_id() Acked by Peter,
> 2) Update to ETMv3 docs requested by suzuki
> 3) rebased and re-tested on coresight/next (6.2-rc2)
> 
> Changes since v5: (requested by suzuki)
> 1) Prefer odd ID values for system IDs to avoid overlap with legacy CPU IDs
> 2) Some style changes
> 
> Changes since v4:
> 1) update to ensure that compiling after each individual patch added still
> works - ie. git bisect not broken through the patchset..
> 
> 2) Revision to some of the now redundant code in cs-etm (James)
> 
> 3) Comments and other minor fixes requested by Suzuki.
> 
> Changes since v3:
> 1) Fixed aarch32 build error in ETM3.x driver.
> Reported-by: kernel test robot <lkp@intel.com>
> 
> Changes since v2:
> 1) Improved backward compatibility: (requested by James)
> 
> Using the new version of perf on an old kernel will generate a usable file
> legacy metadata values are set by the new perf and will be used if mew
> ID packets are not present in the file.
> 
> Using an older version of perf / simpleperf on an updated kernel may still
> work. The trace ID allocator has been updated to use the legacy ID values
> where possible, so generated file and used trace IDs will match up to the
> point where the legacy algorithm is broken anyway.
> 
> 2) Various changes to the ID allocator and ID packet format.
> (suggested by Suzuki)
> 
> 3) per CPU ID info in allocator now stored as atomic type to allow a passive read
> without taking the allocator spinlock. perf flow now allocates and releases ID
> values in setup_aux / free_event. Device enable and event enable use the passive
> read to set the allocated values. This simplifies the locking mechanisms on the
> perf run and fixes issues that arose with locking dependencies.
> 
> Changes since v1:
> (after feedback & discussion with Mathieu & Suzuki).
> 
> 1) API has changed. The global trace ID map is managed internally, so it
> is no longer passed in to the API functions.
> 
> 2) perf record does not use sysfs to find the trace IDs. These are now
> output as AUX_OUTPUT_HW_ID events. The drivers, perf record, and perf report
> have been updated accordingly to generate and handle these events.
> 
> Mike Leach (15):
>    coresight: trace-id: Add API to dynamically assign Trace ID values
>    coresight: Remove obsolete Trace ID unniqueness checks
>    coresight: perf: traceid: Add perf ID allocation and notifiers
>    coresight: stm: Update STM driver to use Trace ID API
>    coresight: etm4x: Update ETM4 driver to use Trace ID API
>    coresight: etm3x: Update ETM3 driver to use Trace ID API
>    coresight: etmX.X: stm: Remove trace_id() callback
>    coresight: trace id: Remove legacy get trace ID function.
>    perf: cs-etm: Move mapping of Trace ID and cpu into helper function
>    perf: cs-etm: Update record event to use new Trace ID protocol
>    kernel: events: Export perf_report_aux_output_id()
>    perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
>    coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
>    coresight: trace-id: Add debug & test macros to Trace ID allocation
>    coresight: etm3x: docs: Alter sysfs documentation for trace id updates

I have pushed the kernel patches on this series to coresight tree next[0].

I will be sending them out to Greg for v6.3. Please could you queue the
perf tool changes in the series ? i.e., Patches 9,10 and 12.


[0] 
https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next


Kind regards
Suzuki
Suzuki K Poulose Jan. 24, 2023, 11:36 a.m. UTC | #2
Hi Arnaldo

Gentle ping.

On 19/01/2023 12:00, Suzuki K Poulose wrote:
> Hi Arnaldo,
> 
> On 16/01/2023 12:49, Mike Leach wrote:
>> The current method for allocating trace source ID values to sources is
>> to use a fixed algorithm for CPU based sources of (cpu_num * 2 + 0x10).
>> The STM is allocated ID 0x1.
>>
>> This fixed algorithm is used in both the CoreSight driver code, and by
>> perf when writing the trace metadata in the AUXTRACE_INFO record.
>>
>> The method needs replacing as currently:-
>> 1. It is inefficient in using available IDs.
>> 2. Does not scale to larger systems with many cores and the algorithm
>> has no limits so will generate invalid trace IDs for cpu number > 44.
>>
>> Additionally requirements to allocate additional system IDs on some
>> systems have been seen.
>>
>> This patch set  introduces an API that allows the allocation of trace IDs
>> in a dynamic manner.
>>
>> Architecturally reserved IDs are never allocated, and the system is
>> limited to allocating only valid IDs.
>>
>> Each of the current trace sources ETM3.x, ETM4.x and STM is updated to 
>> use
>> the new API.
>>
>> For the ETMx.x devices IDs are allocated on certain events
>> a) When using sysfs, an ID will be allocated on hardware enable, or a 
>> read of
>> sysfs TRCTRACEID register and freed when the sysfs reset is written.
>>
>> b) When using perf, ID is allocated on during setup AUX event, and 
>> freed on
>> event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
>> The ID allocator is notified when perf sessions start and stop
>> so CPU based IDs are kept constant throughout any perf session.
>>
>>
>> Note: This patchset breaks some backward compatibility for perf record 
>> and
>> perf report.
>>
>> The version of the AUXTRACE_INFO has been updated to reflect the fact 
>> that
>> the trace source IDs are generated differently. This will
>> mean older versions of perf report cannot decode the newer file.
>>
>> Appies to coresight/next
>>

...

>> Mike Leach (15):
>>    coresight: trace-id: Add API to dynamically assign Trace ID values
>>    coresight: Remove obsolete Trace ID unniqueness checks
>>    coresight: perf: traceid: Add perf ID allocation and notifiers
>>    coresight: stm: Update STM driver to use Trace ID API
>>    coresight: etm4x: Update ETM4 driver to use Trace ID API
>>    coresight: etm3x: Update ETM3 driver to use Trace ID API
>>    coresight: etmX.X: stm: Remove trace_id() callback
>>    coresight: trace id: Remove legacy get trace ID function.
>>    perf: cs-etm: Move mapping of Trace ID and cpu into helper function
>>    perf: cs-etm: Update record event to use new Trace ID protocol
>>    kernel: events: Export perf_report_aux_output_id()
>>    perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
>>    coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
>>    coresight: trace-id: Add debug & test macros to Trace ID allocation
>>    coresight: etm3x: docs: Alter sysfs documentation for trace id updates
> 
> I have pushed the kernel patches on this series to coresight tree next[0].
> 
> I will be sending them out to Greg for v6.3. Please could you queue the
> perf tool changes in the series ? i.e., Patches 9,10 and 12.
> 
> 
> [0] 
> https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next
> 

Please could you pick up the perf tool changes above ?

Suzuki
Suzuki K Poulose Jan. 31, 2023, 11:49 a.m. UTC | #3
Hi Arnaldo

On 24/01/2023 11:36, Suzuki K Poulose wrote:
> Hi Arnaldo
> 
> Gentle ping.
> 
> On 19/01/2023 12:00, Suzuki K Poulose wrote:
>> Hi Arnaldo,
>>
>> On 16/01/2023 12:49, Mike Leach wrote:
>>> The current method for allocating trace source ID values to sources is
>>> to use a fixed algorithm for CPU based sources of (cpu_num * 2 + 0x10).
>>> The STM is allocated ID 0x1.
>>>
>>> This fixed algorithm is used in both the CoreSight driver code, and by
>>> perf when writing the trace metadata in the AUXTRACE_INFO record.
>>>
>>> The method needs replacing as currently:-
>>> 1. It is inefficient in using available IDs.
>>> 2. Does not scale to larger systems with many cores and the algorithm
>>> has no limits so will generate invalid trace IDs for cpu number > 44.
>>>
>>> Additionally requirements to allocate additional system IDs on some
>>> systems have been seen.
>>>
>>> This patch set  introduces an API that allows the allocation of trace 
>>> IDs
>>> in a dynamic manner.
>>>
>>> Architecturally reserved IDs are never allocated, and the system is
>>> limited to allocating only valid IDs.
>>>
>>> Each of the current trace sources ETM3.x, ETM4.x and STM is updated 
>>> to use
>>> the new API.
>>>
>>> For the ETMx.x devices IDs are allocated on certain events
>>> a) When using sysfs, an ID will be allocated on hardware enable, or a 
>>> read of
>>> sysfs TRCTRACEID register and freed when the sysfs reset is written.
>>>
>>> b) When using perf, ID is allocated on during setup AUX event, and 
>>> freed on
>>> event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
>>> The ID allocator is notified when perf sessions start and stop
>>> so CPU based IDs are kept constant throughout any perf session.
>>>
>>>
>>> Note: This patchset breaks some backward compatibility for perf 
>>> record and
>>> perf report.
>>>
>>> The version of the AUXTRACE_INFO has been updated to reflect the fact 
>>> that
>>> the trace source IDs are generated differently. This will
>>> mean older versions of perf report cannot decode the newer file.
>>>
>>> Appies to coresight/next
>>>
> 
> ...
> 
>>> Mike Leach (15):
>>>    coresight: trace-id: Add API to dynamically assign Trace ID values
>>>    coresight: Remove obsolete Trace ID unniqueness checks
>>>    coresight: perf: traceid: Add perf ID allocation and notifiers
>>>    coresight: stm: Update STM driver to use Trace ID API
>>>    coresight: etm4x: Update ETM4 driver to use Trace ID API
>>>    coresight: etm3x: Update ETM3 driver to use Trace ID API
>>>    coresight: etmX.X: stm: Remove trace_id() callback
>>>    coresight: trace id: Remove legacy get trace ID function.
>>>    perf: cs-etm: Move mapping of Trace ID and cpu into helper function
>>>    perf: cs-etm: Update record event to use new Trace ID protocol
>>>    kernel: events: Export perf_report_aux_output_id()
>>>    perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
>>>    coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
>>>    coresight: trace-id: Add debug & test macros to Trace ID allocation
>>>    coresight: etm3x: docs: Alter sysfs documentation for trace id 
>>> updates
>>
>> I have pushed the kernel patches on this series to coresight tree 
>> next[0].
>>
>> I will be sending them out to Greg for v6.3. Please could you queue the
>> perf tool changes in the series ? i.e., Patches 9,10 and 12.
>>
>>
>> [0] 
>> https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next
>>
> 
> Please could you pick up the perf tool changes above ?

Please could you confirm if you are able to queue the perf tool changes 
? Or would you like me route it via coresight tree ?

Kind regards
Suzuki
Suzuki K Poulose Feb. 20, 2023, 4:24 p.m. UTC | #4
Arnaldo

Gentle ping


On 31/01/2023 11:49, Suzuki K Poulose wrote:
> Hi Arnaldo
> 
> On 24/01/2023 11:36, Suzuki K Poulose wrote:
>> Hi Arnaldo
>>
>> Gentle ping.
>>
>> On 19/01/2023 12:00, Suzuki K Poulose wrote:
>>> Hi Arnaldo,
>>>
>>> On 16/01/2023 12:49, Mike Leach wrote:
>>>> The current method for allocating trace source ID values to sources is
>>>> to use a fixed algorithm for CPU based sources of (cpu_num * 2 + 0x10).
>>>> The STM is allocated ID 0x1.
>>>>
>>>> This fixed algorithm is used in both the CoreSight driver code, and by
>>>> perf when writing the trace metadata in the AUXTRACE_INFO record.
>>>>
>>>> The method needs replacing as currently:-
>>>> 1. It is inefficient in using available IDs.
>>>> 2. Does not scale to larger systems with many cores and the algorithm
>>>> has no limits so will generate invalid trace IDs for cpu number > 44.
>>>>
>>>> Additionally requirements to allocate additional system IDs on some
>>>> systems have been seen.
>>>>
>>>> This patch set  introduces an API that allows the allocation of 
>>>> trace IDs
>>>> in a dynamic manner.
>>>>
>>>> Architecturally reserved IDs are never allocated, and the system is
>>>> limited to allocating only valid IDs.
>>>>
>>>> Each of the current trace sources ETM3.x, ETM4.x and STM is updated 
>>>> to use
>>>> the new API.
>>>>
>>>> For the ETMx.x devices IDs are allocated on certain events
>>>> a) When using sysfs, an ID will be allocated on hardware enable, or 
>>>> a read of
>>>> sysfs TRCTRACEID register and freed when the sysfs reset is written.
>>>>
>>>> b) When using perf, ID is allocated on during setup AUX event, and 
>>>> freed on
>>>> event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
>>>> The ID allocator is notified when perf sessions start and stop
>>>> so CPU based IDs are kept constant throughout any perf session.
>>>>
>>>>
>>>> Note: This patchset breaks some backward compatibility for perf 
>>>> record and
>>>> perf report.
>>>>
>>>> The version of the AUXTRACE_INFO has been updated to reflect the 
>>>> fact that
>>>> the trace source IDs are generated differently. This will
>>>> mean older versions of perf report cannot decode the newer file.
>>>>
>>>> Appies to coresight/next
>>>>
>>
>> ...
>>
>>>> Mike Leach (15):
>>>>    coresight: trace-id: Add API to dynamically assign Trace ID values
>>>>    coresight: Remove obsolete Trace ID unniqueness checks
>>>>    coresight: perf: traceid: Add perf ID allocation and notifiers
>>>>    coresight: stm: Update STM driver to use Trace ID API
>>>>    coresight: etm4x: Update ETM4 driver to use Trace ID API
>>>>    coresight: etm3x: Update ETM3 driver to use Trace ID API
>>>>    coresight: etmX.X: stm: Remove trace_id() callback
>>>>    coresight: trace id: Remove legacy get trace ID function.
>>>>    perf: cs-etm: Move mapping of Trace ID and cpu into helper function
>>>>    perf: cs-etm: Update record event to use new Trace ID protocol
>>>>    kernel: events: Export perf_report_aux_output_id()
>>>>    perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
>>>>    coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
>>>>    coresight: trace-id: Add debug & test macros to Trace ID allocation
>>>>    coresight: etm3x: docs: Alter sysfs documentation for trace id 
>>>> updates
>>>
>>> I have pushed the kernel patches on this series to coresight tree 
>>> next[0].
>>>
>>> I will be sending them out to Greg for v6.3. Please could you queue the
>>> perf tool changes in the series ? i.e., Patches 9,10 and 12.
>>>
>>>
>>> [0] 
>>> https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next
>>>
>>
>> Please could you pick up the perf tool changes above ?
> 
> Please could you confirm if you are able to queue the perf tool changes 
> ? Or would you like me route it via coresight tree ?
> 
> Kind regards
> Suzuki
> 


Suzuki
Suzuki K Poulose Feb. 27, 2023, 10:26 a.m. UTC | #5
Mike,

Please could you send all the perf tool related patches as a seperate
series, with all the tags to Arnaldo directly at -rc1.

Please add a cover letter explaining that the kernel changes are
available upstream.

Kind regards
Suzuki

On 20/02/2023 16:24, Suzuki K Poulose wrote:
> Arnaldo
> 
> Gentle ping
> 
> 
> On 31/01/2023 11:49, Suzuki K Poulose wrote:
>> Hi Arnaldo
>>
>> On 24/01/2023 11:36, Suzuki K Poulose wrote:
>>> Hi Arnaldo
>>>
>>> Gentle ping.
>>>
>>> On 19/01/2023 12:00, Suzuki K Poulose wrote:
>>>> Hi Arnaldo,
>>>>
>>>> On 16/01/2023 12:49, Mike Leach wrote:
>>>>> The current method for allocating trace source ID values to sources is
>>>>> to use a fixed algorithm for CPU based sources of (cpu_num * 2 + 
>>>>> 0x10).
>>>>> The STM is allocated ID 0x1.
>>>>>
>>>>> This fixed algorithm is used in both the CoreSight driver code, and by
>>>>> perf when writing the trace metadata in the AUXTRACE_INFO record.
>>>>>
>>>>> The method needs replacing as currently:-
>>>>> 1. It is inefficient in using available IDs.
>>>>> 2. Does not scale to larger systems with many cores and the algorithm
>>>>> has no limits so will generate invalid trace IDs for cpu number > 44.
>>>>>
>>>>> Additionally requirements to allocate additional system IDs on some
>>>>> systems have been seen.
>>>>>
>>>>> This patch set  introduces an API that allows the allocation of 
>>>>> trace IDs
>>>>> in a dynamic manner.
>>>>>
>>>>> Architecturally reserved IDs are never allocated, and the system is
>>>>> limited to allocating only valid IDs.
>>>>>
>>>>> Each of the current trace sources ETM3.x, ETM4.x and STM is updated 
>>>>> to use
>>>>> the new API.
>>>>>
>>>>> For the ETMx.x devices IDs are allocated on certain events
>>>>> a) When using sysfs, an ID will be allocated on hardware enable, or 
>>>>> a read of
>>>>> sysfs TRCTRACEID register and freed when the sysfs reset is written.
>>>>>
>>>>> b) When using perf, ID is allocated on during setup AUX event, and 
>>>>> freed on
>>>>> event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
>>>>> The ID allocator is notified when perf sessions start and stop
>>>>> so CPU based IDs are kept constant throughout any perf session.
>>>>>
>>>>>
>>>>> Note: This patchset breaks some backward compatibility for perf 
>>>>> record and
>>>>> perf report.
>>>>>
>>>>> The version of the AUXTRACE_INFO has been updated to reflect the 
>>>>> fact that
>>>>> the trace source IDs are generated differently. This will
>>>>> mean older versions of perf report cannot decode the newer file.
>>>>>
>>>>> Appies to coresight/next
>>>>>
>>>
>>> ...
>>>
>>>>> Mike Leach (15):
>>>>>    coresight: trace-id: Add API to dynamically assign Trace ID values
>>>>>    coresight: Remove obsolete Trace ID unniqueness checks
>>>>>    coresight: perf: traceid: Add perf ID allocation and notifiers
>>>>>    coresight: stm: Update STM driver to use Trace ID API
>>>>>    coresight: etm4x: Update ETM4 driver to use Trace ID API
>>>>>    coresight: etm3x: Update ETM3 driver to use Trace ID API
>>>>>    coresight: etmX.X: stm: Remove trace_id() callback
>>>>>    coresight: trace id: Remove legacy get trace ID function.
>>>>>    perf: cs-etm: Move mapping of Trace ID and cpu into helper function
>>>>>    perf: cs-etm: Update record event to use new Trace ID protocol
>>>>>    kernel: events: Export perf_report_aux_output_id()
>>>>>    perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
>>>>>    coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
>>>>>    coresight: trace-id: Add debug & test macros to Trace ID allocation
>>>>>    coresight: etm3x: docs: Alter sysfs documentation for trace id 
>>>>> updates
>>>>
>>>> I have pushed the kernel patches on this series to coresight tree 
>>>> next[0].
>>>>
>>>> I will be sending them out to Greg for v6.3. Please could you queue the
>>>> perf tool changes in the series ? i.e., Patches 9,10 and 12.
>>>>
>>>>
>>>> [0] 
>>>> https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next
>>>>
>>>
>>> Please could you pick up the perf tool changes above ?
>>
>> Please could you confirm if you are able to queue the perf tool 
>> changes ? Or would you like me route it via coresight tree ?
>>
>> Kind regards
>> Suzuki
>>
> 
> 
> Suzuki
>
Ganapatrao Kulkarni March 29, 2023, 4:14 a.m. UTC | #6
Hi Mike,

On 27-02-2023 03:56 pm, Suzuki K Poulose wrote:
> Mike,
> 
> Please could you send all the perf tool related patches as a seperate
> series, with all the tags to Arnaldo directly at -rc1.
> 
> Please add a cover letter explaining that the kernel changes are
> available upstream.

Looks like, Perf tool patches corresponding to dynamic trace id are not 
yet merged in to perf-tools-next.

Without these patches, the mainline perf tool breaks for the coresight 
for higher cores.

> 
> Kind regards
> Suzuki
> 
> On 20/02/2023 16:24, Suzuki K Poulose wrote:
>> Arnaldo
>>
>> Gentle ping
>>
>>
>> On 31/01/2023 11:49, Suzuki K Poulose wrote:
>>> Hi Arnaldo
>>>
>>> On 24/01/2023 11:36, Suzuki K Poulose wrote:
>>>> Hi Arnaldo
>>>>
>>>> Gentle ping.
>>>>
>>>> On 19/01/2023 12:00, Suzuki K Poulose wrote:
>>>>> Hi Arnaldo,
>>>>>
>>>>> On 16/01/2023 12:49, Mike Leach wrote:
>>>>>> The current method for allocating trace source ID values to 
>>>>>> sources is
>>>>>> to use a fixed algorithm for CPU based sources of (cpu_num * 2 + 
>>>>>> 0x10).
>>>>>> The STM is allocated ID 0x1.
>>>>>>
>>>>>> This fixed algorithm is used in both the CoreSight driver code, 
>>>>>> and by
>>>>>> perf when writing the trace metadata in the AUXTRACE_INFO record.
>>>>>>
>>>>>> The method needs replacing as currently:-
>>>>>> 1. It is inefficient in using available IDs.
>>>>>> 2. Does not scale to larger systems with many cores and the algorithm
>>>>>> has no limits so will generate invalid trace IDs for cpu number > 44.
>>>>>>
>>>>>> Additionally requirements to allocate additional system IDs on some
>>>>>> systems have been seen.
>>>>>>
>>>>>> This patch set  introduces an API that allows the allocation of 
>>>>>> trace IDs
>>>>>> in a dynamic manner.
>>>>>>
>>>>>> Architecturally reserved IDs are never allocated, and the system is
>>>>>> limited to allocating only valid IDs.
>>>>>>
>>>>>> Each of the current trace sources ETM3.x, ETM4.x and STM is 
>>>>>> updated to use
>>>>>> the new API.
>>>>>>
>>>>>> For the ETMx.x devices IDs are allocated on certain events
>>>>>> a) When using sysfs, an ID will be allocated on hardware enable, 
>>>>>> or a read of
>>>>>> sysfs TRCTRACEID register and freed when the sysfs reset is written.
>>>>>>
>>>>>> b) When using perf, ID is allocated on during setup AUX event, and 
>>>>>> freed on
>>>>>> event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
>>>>>> The ID allocator is notified when perf sessions start and stop
>>>>>> so CPU based IDs are kept constant throughout any perf session.
>>>>>>
>>>>>>
>>>>>> Note: This patchset breaks some backward compatibility for perf 
>>>>>> record and
>>>>>> perf report.
>>>>>>
>>>>>> The version of the AUXTRACE_INFO has been updated to reflect the 
>>>>>> fact that
>>>>>> the trace source IDs are generated differently. This will
>>>>>> mean older versions of perf report cannot decode the newer file.
>>>>>>
>>>>>> Appies to coresight/next
>>>>>>
>>>>
>>>> ...
>>>>
>>>>>> Mike Leach (15):
>>>>>>    coresight: trace-id: Add API to dynamically assign Trace ID values
>>>>>>    coresight: Remove obsolete Trace ID unniqueness checks
>>>>>>    coresight: perf: traceid: Add perf ID allocation and notifiers
>>>>>>    coresight: stm: Update STM driver to use Trace ID API
>>>>>>    coresight: etm4x: Update ETM4 driver to use Trace ID API
>>>>>>    coresight: etm3x: Update ETM3 driver to use Trace ID API
>>>>>>    coresight: etmX.X: stm: Remove trace_id() callback
>>>>>>    coresight: trace id: Remove legacy get trace ID function.
>>>>>>    perf: cs-etm: Move mapping of Trace ID and cpu into helper 
>>>>>> function
>>>>>>    perf: cs-etm: Update record event to use new Trace ID protocol
>>>>>>    kernel: events: Export perf_report_aux_output_id()
>>>>>>    perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
>>>>>>    coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
>>>>>>    coresight: trace-id: Add debug & test macros to Trace ID 
>>>>>> allocation
>>>>>>    coresight: etm3x: docs: Alter sysfs documentation for trace id 
>>>>>> updates
>>>>>
>>>>> I have pushed the kernel patches on this series to coresight tree 
>>>>> next[0].
>>>>>
>>>>> I will be sending them out to Greg for v6.3. Please could you queue 
>>>>> the
>>>>> perf tool changes in the series ? i.e., Patches 9,10 and 12.
>>>>>
>>>>>
>>>>> [0] 
>>>>> https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next
>>>>>
>>>>
>>>> Please could you pick up the perf tool changes above ?
>>>
>>> Please could you confirm if you are able to queue the perf tool 
>>> changes ? Or would you like me route it via coresight tree ?
>>>
>>> Kind regards
>>> Suzuki
>>>
>>
>>
>> Suzuki
>>
> 

Thanks,
Ganapat
Arnaldo Carvalho de Melo March 29, 2023, 1:19 p.m. UTC | #7
Em Wed, Mar 29, 2023 at 09:44:47AM +0530, Ganapatrao Kulkarni escreveu:
> Hi Mike,
> 
> On 27-02-2023 03:56 pm, Suzuki K Poulose wrote:
> > Mike,
> > 
> > Please could you send all the perf tool related patches as a seperate
> > series, with all the tags to Arnaldo directly at -rc1.
> > 
> > Please add a cover letter explaining that the kernel changes are
> > available upstream.
> 
> Looks like, Perf tool patches corresponding to dynamic trace id are not yet
> merged in to perf-tools-next.
> 
> Without these patches, the mainline perf tool breaks for the coresight for
> higher cores.

I'm pushing what I have to tmp.perf-tools-next while this + other
changes goes thru my container set build tests.

- Arnaldo
 
> > 
> > Kind regards
> > Suzuki
> > 
> > On 20/02/2023 16:24, Suzuki K Poulose wrote:
> > > Arnaldo
> > > 
> > > Gentle ping
> > > 
> > > 
> > > On 31/01/2023 11:49, Suzuki K Poulose wrote:
> > > > Hi Arnaldo
> > > > 
> > > > On 24/01/2023 11:36, Suzuki K Poulose wrote:
> > > > > Hi Arnaldo
> > > > > 
> > > > > Gentle ping.
> > > > > 
> > > > > On 19/01/2023 12:00, Suzuki K Poulose wrote:
> > > > > > Hi Arnaldo,
> > > > > > 
> > > > > > On 16/01/2023 12:49, Mike Leach wrote:
> > > > > > > The current method for allocating trace source ID
> > > > > > > values to sources is
> > > > > > > to use a fixed algorithm for CPU based sources of
> > > > > > > (cpu_num * 2 + 0x10).
> > > > > > > The STM is allocated ID 0x1.
> > > > > > > 
> > > > > > > This fixed algorithm is used in both the CoreSight
> > > > > > > driver code, and by
> > > > > > > perf when writing the trace metadata in the AUXTRACE_INFO record.
> > > > > > > 
> > > > > > > The method needs replacing as currently:-
> > > > > > > 1. It is inefficient in using available IDs.
> > > > > > > 2. Does not scale to larger systems with many cores and the algorithm
> > > > > > > has no limits so will generate invalid trace IDs for cpu number > 44.
> > > > > > > 
> > > > > > > Additionally requirements to allocate additional system IDs on some
> > > > > > > systems have been seen.
> > > > > > > 
> > > > > > > This patch set  introduces an API that allows the
> > > > > > > allocation of trace IDs
> > > > > > > in a dynamic manner.
> > > > > > > 
> > > > > > > Architecturally reserved IDs are never allocated, and the system is
> > > > > > > limited to allocating only valid IDs.
> > > > > > > 
> > > > > > > Each of the current trace sources ETM3.x, ETM4.x and
> > > > > > > STM is updated to use
> > > > > > > the new API.
> > > > > > > 
> > > > > > > For the ETMx.x devices IDs are allocated on certain events
> > > > > > > a) When using sysfs, an ID will be allocated on
> > > > > > > hardware enable, or a read of
> > > > > > > sysfs TRCTRACEID register and freed when the sysfs reset is written.
> > > > > > > 
> > > > > > > b) When using perf, ID is allocated on during setup
> > > > > > > AUX event, and freed on
> > > > > > > event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
> > > > > > > The ID allocator is notified when perf sessions start and stop
> > > > > > > so CPU based IDs are kept constant throughout any perf session.
> > > > > > > 
> > > > > > > 
> > > > > > > Note: This patchset breaks some backward
> > > > > > > compatibility for perf record and
> > > > > > > perf report.
> > > > > > > 
> > > > > > > The version of the AUXTRACE_INFO has been updated to
> > > > > > > reflect the fact that
> > > > > > > the trace source IDs are generated differently. This will
> > > > > > > mean older versions of perf report cannot decode the newer file.
> > > > > > > 
> > > > > > > Appies to coresight/next
> > > > > > > 
> > > > > 
> > > > > ...
> > > > > 
> > > > > > > Mike Leach (15):
> > > > > > >    coresight: trace-id: Add API to dynamically assign Trace ID values
> > > > > > >    coresight: Remove obsolete Trace ID unniqueness checks
> > > > > > >    coresight: perf: traceid: Add perf ID allocation and notifiers
> > > > > > >    coresight: stm: Update STM driver to use Trace ID API
> > > > > > >    coresight: etm4x: Update ETM4 driver to use Trace ID API
> > > > > > >    coresight: etm3x: Update ETM3 driver to use Trace ID API
> > > > > > >    coresight: etmX.X: stm: Remove trace_id() callback
> > > > > > >    coresight: trace id: Remove legacy get trace ID function.
> > > > > > >    perf: cs-etm: Move mapping of Trace ID and cpu
> > > > > > > into helper function
> > > > > > >    perf: cs-etm: Update record event to use new Trace ID protocol
> > > > > > >    kernel: events: Export perf_report_aux_output_id()
> > > > > > >    perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
> > > > > > >    coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
> > > > > > >    coresight: trace-id: Add debug & test macros to
> > > > > > > Trace ID allocation
> > > > > > >    coresight: etm3x: docs: Alter sysfs documentation
> > > > > > > for trace id updates
> > > > > > 
> > > > > > I have pushed the kernel patches on this series to
> > > > > > coresight tree next[0].
> > > > > > 
> > > > > > I will be sending them out to Greg for v6.3. Please
> > > > > > could you queue the
> > > > > > perf tool changes in the series ? i.e., Patches 9,10 and 12.
> > > > > > 
> > > > > > 
> > > > > > [0] https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next
> > > > > > 
> > > > > 
> > > > > Please could you pick up the perf tool changes above ?
> > > > 
> > > > Please could you confirm if you are able to queue the perf tool
> > > > changes ? Or would you like me route it via coresight tree ?
> > > > 
> > > > Kind regards
> > > > Suzuki
> > > > 
> > > 
> > > 
> > > Suzuki
> > > 
> > 
> 
> Thanks,
> Ganapat
>
Ganapatrao Kulkarni March 29, 2023, 4:41 p.m. UTC | #8
On 29-03-2023 06:49 pm, Arnaldo Carvalho de Melo wrote:
> Em Wed, Mar 29, 2023 at 09:44:47AM +0530, Ganapatrao Kulkarni escreveu:
>> Hi Mike,
>>
>> On 27-02-2023 03:56 pm, Suzuki K Poulose wrote:
>>> Mike,
>>>
>>> Please could you send all the perf tool related patches as a seperate
>>> series, with all the tags to Arnaldo directly at -rc1.
>>>
>>> Please add a cover letter explaining that the kernel changes are
>>> available upstream.
>>
>> Looks like, Perf tool patches corresponding to dynamic trace id are not yet
>> merged in to perf-tools-next.
>>
>> Without these patches, the mainline perf tool breaks for the coresight for
>> higher cores.
> 
> I'm pushing what I have to tmp.perf-tools-next while this + other
> changes goes thru my container set build tests.

Thanks Arnaldo!
> 
> - Arnaldo
>   
>>>
>>> Kind regards
>>> Suzuki
>>>
>>> On 20/02/2023 16:24, Suzuki K Poulose wrote:
>>>> Arnaldo
>>>>
>>>> Gentle ping
>>>>
>>>>
>>>> On 31/01/2023 11:49, Suzuki K Poulose wrote:
>>>>> Hi Arnaldo
>>>>>
>>>>> On 24/01/2023 11:36, Suzuki K Poulose wrote:
>>>>>> Hi Arnaldo
>>>>>>
>>>>>> Gentle ping.
>>>>>>
>>>>>> On 19/01/2023 12:00, Suzuki K Poulose wrote:
>>>>>>> Hi Arnaldo,
>>>>>>>
>>>>>>> On 16/01/2023 12:49, Mike Leach wrote:
>>>>>>>> The current method for allocating trace source ID
>>>>>>>> values to sources is
>>>>>>>> to use a fixed algorithm for CPU based sources of
>>>>>>>> (cpu_num * 2 + 0x10).
>>>>>>>> The STM is allocated ID 0x1.
>>>>>>>>
>>>>>>>> This fixed algorithm is used in both the CoreSight
>>>>>>>> driver code, and by
>>>>>>>> perf when writing the trace metadata in the AUXTRACE_INFO record.
>>>>>>>>
>>>>>>>> The method needs replacing as currently:-
>>>>>>>> 1. It is inefficient in using available IDs.
>>>>>>>> 2. Does not scale to larger systems with many cores and the algorithm
>>>>>>>> has no limits so will generate invalid trace IDs for cpu number > 44.
>>>>>>>>
>>>>>>>> Additionally requirements to allocate additional system IDs on some
>>>>>>>> systems have been seen.
>>>>>>>>
>>>>>>>> This patch set  introduces an API that allows the
>>>>>>>> allocation of trace IDs
>>>>>>>> in a dynamic manner.
>>>>>>>>
>>>>>>>> Architecturally reserved IDs are never allocated, and the system is
>>>>>>>> limited to allocating only valid IDs.
>>>>>>>>
>>>>>>>> Each of the current trace sources ETM3.x, ETM4.x and
>>>>>>>> STM is updated to use
>>>>>>>> the new API.
>>>>>>>>
>>>>>>>> For the ETMx.x devices IDs are allocated on certain events
>>>>>>>> a) When using sysfs, an ID will be allocated on
>>>>>>>> hardware enable, or a read of
>>>>>>>> sysfs TRCTRACEID register and freed when the sysfs reset is written.
>>>>>>>>
>>>>>>>> b) When using perf, ID is allocated on during setup
>>>>>>>> AUX event, and freed on
>>>>>>>> event free. IDs are communicated using the AUX_OUTPUT_HW_ID packet.
>>>>>>>> The ID allocator is notified when perf sessions start and stop
>>>>>>>> so CPU based IDs are kept constant throughout any perf session.
>>>>>>>>
>>>>>>>>
>>>>>>>> Note: This patchset breaks some backward
>>>>>>>> compatibility for perf record and
>>>>>>>> perf report.
>>>>>>>>
>>>>>>>> The version of the AUXTRACE_INFO has been updated to
>>>>>>>> reflect the fact that
>>>>>>>> the trace source IDs are generated differently. This will
>>>>>>>> mean older versions of perf report cannot decode the newer file.
>>>>>>>>
>>>>>>>> Appies to coresight/next
>>>>>>>>
>>>>>>
>>>>>> ...
>>>>>>
>>>>>>>> Mike Leach (15):
>>>>>>>>     coresight: trace-id: Add API to dynamically assign Trace ID values
>>>>>>>>     coresight: Remove obsolete Trace ID unniqueness checks
>>>>>>>>     coresight: perf: traceid: Add perf ID allocation and notifiers
>>>>>>>>     coresight: stm: Update STM driver to use Trace ID API
>>>>>>>>     coresight: etm4x: Update ETM4 driver to use Trace ID API
>>>>>>>>     coresight: etm3x: Update ETM3 driver to use Trace ID API
>>>>>>>>     coresight: etmX.X: stm: Remove trace_id() callback
>>>>>>>>     coresight: trace id: Remove legacy get trace ID function.
>>>>>>>>     perf: cs-etm: Move mapping of Trace ID and cpu
>>>>>>>> into helper function
>>>>>>>>     perf: cs-etm: Update record event to use new Trace ID protocol
>>>>>>>>     kernel: events: Export perf_report_aux_output_id()
>>>>>>>>     perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet
>>>>>>>>     coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID
>>>>>>>>     coresight: trace-id: Add debug & test macros to
>>>>>>>> Trace ID allocation
>>>>>>>>     coresight: etm3x: docs: Alter sysfs documentation
>>>>>>>> for trace id updates
>>>>>>>
>>>>>>> I have pushed the kernel patches on this series to
>>>>>>> coresight tree next[0].
>>>>>>>
>>>>>>> I will be sending them out to Greg for v6.3. Please
>>>>>>> could you queue the
>>>>>>> perf tool changes in the series ? i.e., Patches 9,10 and 12.
>>>>>>>
>>>>>>>
>>>>>>> [0] https://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git/log/?h=next
>>>>>>>
>>>>>>
>>>>>> Please could you pick up the perf tool changes above ?
>>>>>
>>>>> Please could you confirm if you are able to queue the perf tool
>>>>> changes ? Or would you like me route it via coresight tree ?
>>>>>
>>>>> Kind regards
>>>>> Suzuki
>>>>>
>>>>
>>>>
>>>> Suzuki
>>>>
>>>
>>
>> Thanks,
>> Ganapat
>>
>

Thanks,
Ganapat