Message ID | 20230125081023.1573712-1-d-gole@ti.com (mailing list archive) |
---|---|
Headers | show |
Series | STIG Mode Fixes for spi-cadence-qspi driver | expand |
On Wed, 25 Jan 2023 13:40:19 +0530, Dhruva Gole wrote: > * Reset the CMD_CTRL Register, without which read/writes in STIG mode > were failing in some cases. The issue came to light while using STIG > Mode for small reads. > * Also add a flag that can allow us to do direct reads but distinguish > direct writes, thus enabling us to disable writes in DAC mode in some > cases that require it. (Like to write to some connected Flash registers) > * Fix register reads in STIG mode and also use STIG mode while reading flash > registers. > Currently if you try to read a register while in STIG mode there is no > support for ADDR and thus naturally a register never gets read from the > flash. > > [...] Applied to broonie/spi.git for-next Thanks! [1/4] spi: cadence-quadspi: Reset CMD_CTRL Reg on cmd r/w completion commit: d4f43a2d05faf7febb839edb2e9e8f85dfb9d2d2 [2/4] spi: cadence-quadspi: Add flag for direct mode writes commit: e8c51b164355c1d519a4b8ad0873f131035d26b7 [3/4] spi: cadence-quadspi: setup ADDR Bits in cmd reads commit: a8674ae02db232927385c2d0a063e10c0118f5ca [4/4] spi: cadence-quadspi: use STIG mode for small reads commit: d403fb6e76bf854ef0f7d84e797e51b9494788e0 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark