From patchwork Thu Mar 9 06:22:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13166811 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1FEFC64EC4 for ; Thu, 9 Mar 2023 06:23:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=bs4hQ66Q3A6JUgZwBPCYBK/emGaBvT9xtPjVCG/k5oA=; b=bUFIzWMyhAmmfS ONzQkDdqpE0g5XK4atlRy6Rk5HA+GgCZR1hl3zrLGenND1gw9qL/j0I5ycpLXONpOpeoqC2YwYtof QBQ/F4VJOr8ffp4RzvHnquPfgnU1KuE4D2854Hd3Q1Xzwch9LgaU5pUoezfZdDaCCSgqsdVE3WqeE Oqc/HfepnfpLVqoWFaHpOI9If1DKLW7q/U5vr+58c9m+yLGFXDoybEB0WsJPvK6xVI+V4brDTuFHW flh0Zf9wj0tcMxaSbJVrtOxmDaLX7y7fCe5AqXhiw7SnEQlbPBsuhbgi9qdQmDiXiAKBaPh0rgWyA DQ+zJD6XW/HuFGJ9p5Hg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pa9fz-0083wa-Ai; Thu, 09 Mar 2023 06:22:55 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pa9ft-0083uC-95; Thu, 09 Mar 2023 06:22:53 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3296MfrU086170; Thu, 9 Mar 2023 00:22:41 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678342961; bh=KNT+wy4RDHbbcn7KtlaJoGk0uuKRypZmes/R0EO1Tig=; h=From:To:CC:Subject:Date; b=lH43B+H8U9CmZO7o4t1rR2bcptNaQK09e44ygjm7JDTYtIfeTadCCG5spOvvuwxkO /IGzEDioqwjdBBNso6O3fm1oOS74GOXstXfgs507vNumZAYomzMPh1pDBnh6J/1y/2 uXtSzT9Bi/AKA3ZXz4gDjP8LkfGzb+obLugXr8DY= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3296MfOV004272 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Mar 2023 00:22:41 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Thu, 9 Mar 2023 00:22:41 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Thu, 9 Mar 2023 00:22:41 -0600 Received: from uda0492258.dhcp.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3296Mca1088683; Thu, 9 Mar 2023 00:22:38 -0600 From: Siddharth Vadapalli To: , , CC: , , , , Subject: [PATCH 0/3] PHY-GMII-SEL: Add support for SGMII mode Date: Thu, 9 Mar 2023 11:52:34 +0530 Message-ID: <20230309062237.389444-1-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230308_222249_447111_244EA5A8 X-CRM114-Status: UNSURE ( 7.69 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello, This series adds support to configure the CPSW MAC's PHY in SGMII mode. Also, SGMII mode is enabled for TI's J7200 and J721E SoCs. Siddharth Vadapalli (3): phy: ti: phy-gmii-sel: Add support for SGMII mode phy: ti: gmii-sel: Enable SGMII mode for J7200 phy: ti: gmii-sel: Enable SGMII mode for J721E drivers/phy/ti/phy-gmii-sel.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)