From patchwork Fri Mar 10 10:35:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13169156 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BFD3CC64EC4 for ; Fri, 10 Mar 2023 10:36:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=lKZu3ZIkinMp5p+m3w/J2by2BDJMhSMafq9GjHE4aos=; b=BKrxo4/9lnPYow WzscKsA0/g39oBxFoRZqfcphr1tbywIZAxvSaxR9TMcTGsGLgrG4LhZlrkov1QRBxBdSEiCo8sWyL 9FBS2uP3wM/nG4Ep46qHDUMLkzTQhbKD/q2YohyA23NlfqF7Xfcy9MtUWwjOoxUZ538MR+NrUuhWN OeX19OUWjpvKULoz5b7LviqaNP7Jw0AewZ13SVA1vHKvfU7ZXfXMEWximM+2Bk/BAIOlil2qV1BEi lkRfeq7T0sqkAlzgeDFhKxYYDMPEuTfTyLGGUVyzuwlVPdc8c6hZk6Ep7pbNpPrAVltdIwOeYIt3u ZS9NbPr6asVf7pW2/sAw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1paa5l-00ECLQ-VQ; Fri, 10 Mar 2023 10:35:18 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1paa5i-00ECJ7-5a for linux-arm-kernel@lists.infradead.org; Fri, 10 Mar 2023 10:35:15 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32AAZ8Da112563; Fri, 10 Mar 2023 04:35:08 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678444508; bh=D0330RTbUy7abXczlK7a38OBmVYfwKLOPLSgs9FRwnQ=; h=From:To:CC:Subject:Date; b=LTaETDYmpbXpl/oQ3MnxuF02I3bTfYl+V9VUedh51MMs5yKT6SpwC2ZGFZKBWJ01L //0yDYALG8kfnlpNJD7vtxstKHS878r7SnPLiwVFwC/UcAw+e4VCN3LiTSYnUUQNuE FPwldcXSxu7/YrOjFBDz/UAWUTb07+7PTh/Evjwo= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32AAZ8qX055216 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 10 Mar 2023 04:35:08 -0600 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 10 Mar 2023 04:35:08 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 10 Mar 2023 04:35:08 -0600 Received: from uda0492258.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32AAZ4Pf088652; Fri, 10 Mar 2023 04:35:05 -0600 From: Siddharth Vadapalli To: , , , , , CC: , , , , Subject: [PATCH v2 0/2] Add device-tree support for CPSW9G on J721E SoC Date: Fri, 10 Mar 2023 16:05:02 +0530 Message-ID: <20230310103504.731845-1-s-vadapalli@ti.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230310_023514_309560_85E0F2D5 X-CRM114-Status: GOOD ( 10.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello, This series adds the device-tree nodes for CPSW9G instance of CPSW Ethernet Switch on TI's J721E SoC. Additionally, an overlay file is also added to enable CPSW9G nodes in QSGMII mode with the Add-On J7 QUAD Port Ethernet expansion QSGMII daughtercard. --- Changes from v1: 1. Rename node name "mdio_pins_default" to "mdio0-pins-default", since node names shouldn't contain underscores. 2. Change node label "mdio_pins_default" to "mdio0_pins_default". The reason for adding 0 after mdio with the above changes, is to indicate the association of the cpsw0 instance of CPSW with this instance of MDIO. v1: https://lore.kernel.org/r/20230310092804.692303-1-s-vadapalli@ti.com Siddharth Vadapalli (2): arm64: dts: ti: k3-j721e: Add CPSW9G nodes arm64: dts: ti: k3-j721e: Add overlay to enable CPSW9G ports in QSGMII mode arch/arm64/boot/dts/ti/Makefile | 4 + arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 107 +++++++++++++ .../dts/ti/k3-j721e-quad-port-eth-exp.dtso | 148 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721e.dtsi | 1 + 4 files changed, 260 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-quad-port-eth-exp.dtso