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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id o9-20020a05651238a900b004db48ae69cbsm18134lft.206.2023.03.13.09.47.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Mar 2023 09:47:48 -0700 (PDT) From: Konrad Dybcio Subject: [PATCH v3 0/6] Clean up Adreno SMMU bindings Date: Mon, 13 Mar 2023 17:44:15 +0100 Message-Id: <20230313-topic-gpu_smmu_bindings-v3-0-66ab655fbfd5@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAN9SD2QC/x2N0QrDIAwAf6XkeYJTkLJfGaNEm9pAm4qZY1D67 5M93sFxJyhVJoXHcEKlDysf0sHfBkgrSibDc2dw1nnr7968j8LJ5NIm3fc2RZaZJasJFpdxxBB cQuh1RCUTK0paey9t27oslRb+/nfP13X9AHNYa+d+AAAA To: Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson Cc: linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Konrad Dybcio , Krzysztof Kozlowski X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678726067; l=1268; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=f4B1yJzVBbsZqehz8JLbHpySiLGAvrTlDRteS3PGcW0=; b=0ksZnyi/nnvCpvu93COpZxIxLAkofAIO0o8CMs9a6YKsMYcpaqt99maJN0Bj97+fqQDOYqcQtkJ6 HsLVAj2ED/WYQcvwwtZkIiRID9VdiI2IypPjtTHnfkJR+PzOZ6Fn X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230313_094756_729207_3FDDA30B X-CRM114-Status: UNSURE ( 8.15 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org v2 -> v3: - Pick up acks - Fix the "arm,smmu-500" typo in bindings (Rob) - use b4 v2: https://lore.kernel.org/lkml/3aa78b15-8e6c-9657-0d08-0d0452d51fbe@linaro.org/T/#md7074966fdcbbd884baf62153f726bec54b2e819 Signed-off-by: Konrad Dybcio --- Konrad Dybcio (6): dt-bindings: arm-smmu: Use qcom,smmu compatible for MMU500 adreno SMMUs dt-bindings: arm-smmu: Add SM8350 Adreno SMMU arm64: dts: qcom: sc7280: Add qcom,smmu-500 to Adreno SMMU arm64: dts: qcom: sm8150: Add qcom,smmu-500 to Adreno SMMU arm64: dts: qcom: sm8250: Add qcom,smmu-500 to Adreno SMMU arm64: dts: qcom: sm8350: Add qcom,smmu-500 to Adreno SMMU Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 15 +++++++++++++-- arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8250.dtsi | 3 ++- arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ++- 5 files changed, 21 insertions(+), 6 deletions(-) --- base-commit: 24469a0e5052ba01a35a15f104717a82b7a4798b change-id: 20230313-topic-gpu_smmu_bindings-60af88a662ca Best regards,