| Message ID | 20230331062521.529005-1-s-vadapalli@ti.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | PHY-GMII-SEL: Add support for J784S4 SoC | expand |
On 31-03-23, 11:55, Siddharth Vadapalli wrote: > Hello, > > This series TI's J784S4 SoC. A new compatible is added for the J784S4 SoC, > with QSGMII mode enabled. Also, the CPSW9G instance of J784S4 SoC supports > USXGMII mode. Thus, add support to configure USXGMII mode. Sorry this fails to apply for me, pls rebase and send > > Note: > This series is based on top of the following series: > https://lore.kernel.org/r/20230309063514.398705-1-s-vadapalli@ti.com/ > > The patch corresponding to the device-tree bindings for the compatible > "ti,j784s4-cpsw9g-phy-gmii-sel" is posted at: > https://lore.kernel.org/r/20230315092408.1722114-1-s-vadapalli@ti.com > Since the above patch has received an Acked-by from Krzysztof Kozlowski, > I am posting this series using the compatible. > > Regards, > Siddharth. > > Siddharth Vadapalli (2): > phy: ti: gmii-sel: Add support for CPSW9G GMII SEL in J784S4 > phy: ti: gmii-sel: Enable USXGMII mode for J784S4 > > drivers/phy/ti/phy-gmii-sel.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > -- > 2.25.1
Hello Vinod, On 31-03-2023 19:03, Vinod Koul wrote: > On 31-03-23, 11:55, Siddharth Vadapalli wrote: >> Hello, >> >> This series TI's J784S4 SoC. A new compatible is added for the J784S4 SoC, >> with QSGMII mode enabled. Also, the CPSW9G instance of J784S4 SoC supports >> USXGMII mode. Thus, add support to configure USXGMII mode. > > Sorry this fails to apply for me, pls rebase and send This series has to be applied after the following series: https://lore.kernel.org/r/20230309063514.398705-1-s-vadapalli@ti.com/ as mentioned below. Regards, Siddharth. > >> >> Note: >> This series is based on top of the following series: >> https://lore.kernel.org/r/20230309063514.398705-1-s-vadapalli@ti.com/ >> >> The patch corresponding to the device-tree bindings for the compatible >> "ti,j784s4-cpsw9g-phy-gmii-sel" is posted at: >> https://lore.kernel.org/r/20230315092408.1722114-1-s-vadapalli@ti.com >> Since the above patch has received an Acked-by from Krzysztof Kozlowski, >> I am posting this series using the compatible. >> >> Regards, >> Siddharth. >> >> Siddharth Vadapalli (2): >> phy: ti: gmii-sel: Add support for CPSW9G GMII SEL in J784S4 >> phy: ti: gmii-sel: Enable USXGMII mode for J784S4 >> >> drivers/phy/ti/phy-gmii-sel.c | 22 ++++++++++++++++++++++ >> 1 file changed, 22 insertions(+) >> >> -- >> 2.25.1 >
On 31-03-23, 19:19, Siddharth Vadapalli wrote: > Hello Vinod, > > On 31-03-2023 19:03, Vinod Koul wrote: > > On 31-03-23, 11:55, Siddharth Vadapalli wrote: > >> Hello, > >> > >> This series TI's J784S4 SoC. A new compatible is added for the J784S4 SoC, > >> with QSGMII mode enabled. Also, the CPSW9G instance of J784S4 SoC supports > >> USXGMII mode. Thus, add support to configure USXGMII mode. > > > > Sorry this fails to apply for me, pls rebase and send > > This series has to be applied after the following series: > https://lore.kernel.org/r/20230309063514.398705-1-s-vadapalli@ti.com/ > as mentioned below. Okay applied now