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Tue, 11 Apr 2023 05:59:14 -0700 (PDT) Received: from brgl-uxlite.home ([2a01:cb1d:334:ac00:a099:fc1d:c99a:bfc3]) by smtp.gmail.com with ESMTPSA id e24-20020a05600c219800b003eae73f0fc1sm16944591wme.18.2023.04.11.05.59.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Apr 2023 05:59:14 -0700 (PDT) From: Bartosz Golaszewski To: Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Will Deacon , Robin Murphy , Joerg Roedel , Catalin Marinas , Arnd Bergmann Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, Bartosz Golaszewski Subject: [PATCH v3 0/7] arm64: dts: qcom: sa8775p: add more IOMMUs Date: Tue, 11 Apr 2023 14:59:03 +0200 Message-Id: <20230411125910.401075-1-brgl@bgdev.pl> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230411_055918_603009_F9401BDF X-CRM114-Status: GOOD ( 16.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Bartosz Golaszewski Add the GPU and PCIe IOMMUs for sa8775p platforms as well as the required GPU clock controller driver. NOTE: I didn't pick up Krzysztof's tag for patch 4/7 as the patch changed significantly. v2 -> v3: - select QCOM_GDSC in Kconfig for the GPUCC module - the GPU SMMU is actually an adreno SMMU so describe it as such and fix the DT - fix the mapped memory size for the PCIe SMMU v1 -> v2: - remove unused include in the GPUCC driver - remove unused clock from the GPUCC driver and make it compatible with the generic QCom GPUCC bindings - put the new defconfig option in the right place (as per savedefconfig) and make the GPUCC driver a module rather than built-in - describe the smmu clocks for sa8775p in dt-bindings Bartosz Golaszewski (6): dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P arm64: defconfig: enable the SA8775P GPUCC driver arm64: dts: qcom: sa8775p: add the pcie smmu node arm64: dts: qcom: sa8775p: add the GPU clock controller node dt-bindings: iommu: arm,smmu: enable clocks for sa8775p Adreno SMMU arm64: dts: qcom: sa8775p: add the GPU IOMMU node Shazad Hussain (1): clk: qcom: add the GPUCC driver for sa8775p .../devicetree/bindings/clock/qcom,gpucc.yaml | 2 + .../devicetree/bindings/iommu/arm,smmu.yaml | 6 +- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 125 ++++ arch/arm64/configs/defconfig | 1 + drivers/clk/qcom/Kconfig | 9 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gpucc-sa8775p.c | 625 ++++++++++++++++++ .../dt-bindings/clock/qcom,sa8775p-gpucc.h | 50 ++ 8 files changed, 817 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/qcom/gpucc-sa8775p.c create mode 100644 include/dt-bindings/clock/qcom,sa8775p-gpucc.h