From patchwork Sat Apr 15 16:40:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 13212577 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3330EC77B70 for ; Sat, 15 Apr 2023 16:41:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: Mime-Version:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=/9U0+Ex1RK69htdpl2P6EPHXH99nek3hSHOHax0cA4I=; b=Pe3 GUOo4LPQnSRj1eI2Srxg9NssmKYFpHwKF6cTYjAAmkPGJRlyl0DGwi28TPGvWEJLSFl2s2DRzV7gq KVfGrXy7XTrtwNkqwiSxhSc9xxb32+A/Vu52wkzDVQlsObl8nRQ17jByRb9+vRpTmhqLgzSnvSxNt VSSsl98jm/4Q7APnW2faO72+dIET5StvrPStPHaNLB9FHrr02sPuFxNARgE4mcL33WWYoUPtA7gAb +AgXHxP/g8Fh/l/6A2bWSC0yzxrkxNeJ9iPznnWukwyE5+zV/FsVI9CPUBZrwSragSfczGf18xecq ye4uPPil14J2flI96ZiROZtMp8JxJzw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pnixB-00CTJU-1w; Sat, 15 Apr 2023 16:40:45 +0000 Received: from mail-pj1-x1049.google.com ([2607:f8b0:4864:20::1049]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pnix7-00CTII-2r for linux-arm-kernel@lists.infradead.org; Sat, 15 Apr 2023 16:40:43 +0000 Received: by mail-pj1-x1049.google.com with SMTP id j19-20020a17090a841300b00246f53c6eecso5062460pjn.1 for ; Sat, 15 Apr 2023 09:40:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681576840; x=1684168840; h=cc:to:from:subject:message-id:mime-version:date:from:to:cc:subject :date:message-id:reply-to; bh=edJ/8m/hi3oLGytM7aKqe1ZAWmH9bh2Sy5kO3X9HLCg=; b=Th9kfbqFynMI8UUMlJ2d6npf580RhcOR+Uu3lULcTwR9M7a6Cf8xrkCZ5LL+JuxvE6 Liz+rX1RMT9MiKIOGue/ij24QEwfs9BdoRpSm2wUH4fDF7I7PQPlWkVx14qMhn/lq0NL xPflLSBH6iTeTjp+sWd6hnB9Q1mafAUqbnc6clmUfjnkFV0dCmRH+dcPm731eLpedQRG D1FROyyIReVjWo1/ONTD31UrstcbmU0rejKbOY8kpM2MtLNQ4HsArLjHMqjlcofj2imP mJ2oJ1IdJzMcz9lxcyS2DftCay9wfFTeq/Nw20UvecehSmQ/ld3tDT4llyZ9EGokv90+ okhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681576840; x=1684168840; h=cc:to:from:subject:message-id:mime-version:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=edJ/8m/hi3oLGytM7aKqe1ZAWmH9bh2Sy5kO3X9HLCg=; b=fjSsSnFVG4/0kHKuTMaFJBQP77/bePmBKloOtRdVVErqeUvMEotfUCC4bmUK6bTF56 1dBjHuCQkrHv5dhhJClwzQJX0dxYueGABXzsapcPq2zy0iznFO7QvoAlKXxMpzoTKB/R X4BJucGW92RWZNqZFCE8WqfriQQGuB7P/5N9lpIRgd37iPbjsSDnhL9GLXNEXGsVKvN/ YaWfhZ7Gal6aY1eDHTTIw6Mb2mmQ8nX9dkoyicBHKWrfQcwtx60pm7kUADUU4/4BnpRD 5QS/AgqzF9xb3cFdhdDifs4NR7nsagDEOfLzhSvs5b7z64scWDcUClHSnxclPdMT+oAY vjuw== X-Gm-Message-State: AAQBX9cDU/uiIf87qrVGqu/V51NPFxta9TJ3UBsUiRqHUcgsuaM8HeZz e50+c9j62qeJ/XwLSvs2zXncchX61k4= X-Google-Smtp-Source: AKy350Yv3s5ep7D7zZyG+Et4G6Q08mYKXp9AqiJJfgV4/tHON+L4dGztaBGVDdCldKPepvfT1xtBuK3yPus= X-Received: from reijiw-west4.c.googlers.com ([fda3:e722:ac3:cc00:20:ed76:c0a8:aa1]) (user=reijiw job=sendgmr) by 2002:a63:ba5a:0:b0:518:244c:1cde with SMTP id l26-20020a63ba5a000000b00518244c1cdemr1709195pgu.2.1681576839640; Sat, 15 Apr 2023 09:40:39 -0700 (PDT) Date: Sat, 15 Apr 2023 09:40:27 -0700 Mime-Version: 1.0 X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog Message-ID: <20230415164029.526895-1-reijiw@google.com> Subject: [PATCH v3 0/2] KVM: arm64: PMU: Correct the handling of PMUSERENR_EL0 From: Reiji Watanabe To: Marc Zyngier , Mark Rutland , Oliver Upton , Will Deacon , Catalin Marinas , kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Zenghui Yu , Suzuki K Poulose , Paolo Bonzini , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata , Shaoqin Huang , Rob Herring , Reiji Watanabe X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230415_094041_927972_3A85CA71 X-CRM114-Status: GOOD ( 14.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series will fix bugs in KVM's handling of PMUSERENR_EL0. With PMU access support from EL0 [1], the perf subsystem would set CR and ER bits of PMUSERENR_EL0 as needed to allow EL0 to have a direct access to PMU counters. However, KVM appears to assume that the register value is always zero for the host EL0, and has the following two problems in handling the register. [A] The host EL0 might lose the direct access to PMU counters, as KVM always clears PMUSERENR_EL0 before returning to userspace. [B] With VHE, the guest EL0 access to PMU counters might be trapped to EL1 instead of to EL2 (even when PMUSERENR_EL0 for the guest indicates that the guest EL0 has an access to the counters). This is because, with VHE, KVM sets ER, CR, SW and EN bits of PMUSERENR_EL0 to 1 on vcpu_load() to ensure to trap PMU access from the guset EL0 to EL2, but those bits might be cleared by the perf subsystem after vcpu_load() (when PMU counters are programmed for the vPMU emulation). Patch-1 will fix [A], and Patch-2 will fix [B] respectively. The series is based on v6.3-rc6. v3: - While vcpu_{put,load}() are manipulating PMUSERENR_EL0, disable IRQs to prevent a race condition between these processes and IPIs that updates PMUSERENR_EL0. [Mark] v2: https://lore.kernel.org/all/20230408034759.2369068-1-reijiw@google.com/ - Save the PMUSERENR_EL0 for the host in the sysreg array of kvm_host_data. [Marc] - Don't let armv8pmu_start() overwrite PMUSERENR if the vCPU is loaded, instead have KVM update the saved shadow register value for the host. [Marc, Mark] v1: https://lore.kernel.org/all/20230329002136.2463442-1-reijiw@google.com/ [1] https://github.com/torvalds/linux/commit/83a7a4d643d33a8b74a42229346b7ed7139fcef9 Reiji Watanabe (2): KVM: arm64: PMU: Restore the host's PMUSERENR_EL0 KVM: arm64: PMU: Don't overwrite PMUSERENR with vcpu loaded arch/arm64/include/asm/kvm_host.h | 7 +++++ arch/arm64/kernel/perf_event.c | 21 ++++++++++++-- arch/arm64/kvm/hyp/include/hyp/switch.h | 37 +++++++++++++++++++++++-- arch/arm64/kvm/hyp/nvhe/Makefile | 2 +- arch/arm64/kvm/pmu.c | 25 +++++++++++++++++ include/linux/irqflags.h | 4 +-- 6 files changed, 88 insertions(+), 8 deletions(-) base-commit: 09a9639e56c01c7a00d6c0ca63f4c7c41abe075d