From patchwork Sun Apr 16 04:53:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 13212713 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CA043C77B73 for ; Sun, 16 Apr 2023 04:54:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Message-ID: Mime-Version:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=bZkkePRd7igKe1gzFRSfq0pR5G/7HxPtgXdrgmJ0Rtw=; b=WKM 09R0dyZPwq4DDLE85mGuw2vfmY4KBPbpz2tmxOKsSOHE3U34r8BWYcJnOnUPmcyWA42nhvuhS3G98 DQi4VCicrouk8rwkZuawt12ASihW2PMupVj+w6VyHLDcHBdfONruj3OdLsEZ9TyO5t/gHF3v4lbaY 1fZA/DknAtKUodG3FXVZNOkvPKqN3DbAGriHWBUc3I7RoiSRQvSb9yD11PYRdSYhRW23BtGaJszzn 7zFcYSwP9rs3r20DYRW/fl6HFK1SvzFr5UpgbngSuvv/rZVU/m1LJwGB3BtLxT1pkvNLPLidIv7QQ +qW26kS9sD0YuhHZUCMSPicgGl1NIpQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pnuOQ-00D7MC-1E; Sun, 16 Apr 2023 04:53:38 +0000 Received: from mail-yb1-xb49.google.com ([2607:f8b0:4864:20::b49]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pnuON-00D7LL-17 for linux-arm-kernel@lists.infradead.org; Sun, 16 Apr 2023 04:53:36 +0000 Received: by mail-yb1-xb49.google.com with SMTP id v200-20020a252fd1000000b00b8f548a72bbso8955986ybv.9 for ; Sat, 15 Apr 2023 21:53:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1681620811; x=1684212811; h=cc:to:from:subject:message-id:mime-version:date:from:to:cc:subject :date:message-id:reply-to; bh=GSBOHO8J2MQ2o/VKIsPqTm9ugOUbkx/1SnLPtI3xz4A=; b=ao6Gt0p3QbgT6+gIHy9isrfjtcrgOsou5uEF8cXmo65HRAKbSjAWxBlj5942sbxx7Y /LqSQftNAIHrBN8knrrYx+4xCYjN/X82j3NAddpQDH9Rlx5YGZf8VxJqH09V7XpxhFJx PdWGl5uOrq8wtx/GO6wmEfxK2+rlcFb6ZO8G8UnK8ey0/TeOKeDZI4vdkuVmTjHX4Jdm O9h6hXfUrxOQXsInVKpGZilOzVoAEBqBQ6vPAsQNSJhHcY2LbqUE6sS3rKDCP/s5kK4d PzFCt9s8+1cojNl2E6UpxGcnGyx9sA3BYYsvaJXx4ve5N6GbB7UiuIhHfywVhcEywCPj hW2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681620811; x=1684212811; h=cc:to:from:subject:message-id:mime-version:date:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=GSBOHO8J2MQ2o/VKIsPqTm9ugOUbkx/1SnLPtI3xz4A=; b=Fy3Q8d/FpwTAqOgkN87Y+jmUsD/10fiMYvS6TZuAbF1CYke+JGEgBYheg0tARZfn0E aSlkGzzT62plDvwIWPtF3qr/Z2fGrVffK40aTcc/AumoNlySEeo3Um2PhSfC1OxohWya pYrX6bXTBGfqVV9gwsG1Goj3d3WhrP2+4/apKeqr2F2svh5amq0KkaYKZV56k7cbdzku 1O3sGfWmVdRYkSXGYzfWxfUkwlAHTus/uoCPE0UtW9PLUJrsEG8I+MiQTVkZsvzMo16M cqJp+XE32QrUD+nVuKBeiZ2i6yg4F/o2grMQapUCKHKZA+cCl3SoToLKCtMZmzoTdv4N m8vA== X-Gm-Message-State: AAQBX9d6N5AoaM4Tpt7OrzwT8vLKmw4br4PujZye3ev4uuG0zBczkJKv WbIk3zEHggCfHUIDGcLLIyxgpWnRf/M= X-Google-Smtp-Source: AKy350YrV2Jc2viuvwLHBzra9y9vpzRiIgY9TA0+SRfr+P59RNJCm7Qq0WQi8xckYzZJwFXI/uJfbMWGyoU= X-Received: from reijiw-west4.c.googlers.com ([fda3:e722:ac3:cc00:20:ed76:c0a8:aa1]) (user=reijiw job=sendgmr) by 2002:a25:e08c:0:b0:b8f:3647:d757 with SMTP id x134-20020a25e08c000000b00b8f3647d757mr7226448ybg.11.1681620811185; Sat, 15 Apr 2023 21:53:31 -0700 (PDT) Date: Sat, 15 Apr 2023 21:53:14 -0700 Mime-Version: 1.0 X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog Message-ID: <20230416045316.1367849-1-reijiw@google.com> Subject: [PATCH v4 0/2] KVM: arm64: PMU: Correct the handling of PMUSERENR_EL0 From: Reiji Watanabe To: Marc Zyngier , Mark Rutland , Oliver Upton , Will Deacon , Catalin Marinas , kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Zenghui Yu , Suzuki K Poulose , Paolo Bonzini , Ricardo Koller , Jing Zhang , Raghavendra Rao Anata , Shaoqin Huang , Rob Herring , Reiji Watanabe X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230415_215335_425497_CCA921D6 X-CRM114-Status: GOOD ( 14.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series will fix bugs in KVM's handling of PMUSERENR_EL0. With PMU access support from EL0 [1], the perf subsystem would set CR and ER bits of PMUSERENR_EL0 as needed to allow EL0 to have a direct access to PMU counters. However, KVM appears to assume that the register value is always zero for the host EL0, and has the following two problems in handling the register. [A] The host EL0 might lose the direct access to PMU counters, as KVM always clears PMUSERENR_EL0 before returning to userspace. [B] With VHE, the guest EL0 access to PMU counters might be trapped to EL1 instead of to EL2 (even when PMUSERENR_EL0 for the guest indicates that the guest EL0 has an access to the counters). This is because, with VHE, KVM sets ER, CR, SW and EN bits of PMUSERENR_EL0 to 1 on vcpu_load() to ensure to trap PMU access from the guset EL0 to EL2, but those bits might be cleared by the perf subsystem after vcpu_load() (when PMU counters are programmed for the vPMU emulation). Patch-1 will fix [A], and Patch-2 will fix [B] respectively. The series is based on v6.3-rc6. v4: - Introduce NO_DEBUG_IRQFLAGS to exclude warn_bogus_irq_restore() from the nVHE hyp code. This is to address the issue [2] that was reported by kernel test robot . v3: https://lore.kernel.org/all/20230415164029.526895-1-reijiw@google.com/ - While vcpu_{put,load}() are manipulating PMUSERENR_EL0, disable IRQs to prevent a race condition between these processes and IPIs that updates PMUSERENR_EL0. [Mark] v2: https://lore.kernel.org/all/20230408034759.2369068-1-reijiw@google.com/ - Save the PMUSERENR_EL0 for the host in the sysreg array of kvm_host_data. [Marc] - Don't let armv8pmu_start() overwrite PMUSERENR if the vCPU is loaded, instead have KVM update the saved shadow register value for the host. [Marc, Mark] v1: https://lore.kernel.org/all/20230329002136.2463442-1-reijiw@google.com/ [1] https://github.com/torvalds/linux/commit/83a7a4d643d33a8b74a42229346b7ed7139fcef9 [2] https://lore.kernel.org/all/202304160658.Oqr1xZbi-lkp@intel.com/ Reiji Watanabe (2): KVM: arm64: PMU: Restore the host's PMUSERENR_EL0 KVM: arm64: PMU: Don't overwrite PMUSERENR with vcpu loaded arch/arm64/include/asm/kvm_host.h | 7 +++++ arch/arm64/kernel/perf_event.c | 21 ++++++++++++-- arch/arm64/kvm/hyp/include/hyp/switch.h | 37 +++++++++++++++++++++++-- arch/arm64/kvm/hyp/nvhe/Makefile | 2 +- arch/arm64/kvm/pmu.c | 25 +++++++++++++++++ include/linux/irqflags.h | 6 ++-- 6 files changed, 89 insertions(+), 9 deletions(-) base-commit: 09a9639e56c01c7a00d6c0ca63f4c7c41abe075d