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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , , , , Schuyler Patton , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , , , Oliver Hartkopp Subject: [PATCH v2 0/4] Enable multiple MCAN on AM62x Date: Mon, 24 Apr 2023 14:53:58 -0500 Message-ID: <20230424195402.516-1-jm@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230424_125421_120778_10AA85FC X-CRM114-Status: GOOD ( 16.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On AM62x there is one MCAN in MAIN domain and two in MCU domain. The MCANs in MCU domain were not enabled since there is no hardware interrupt routed to A53 GIC interrupt controller. Therefore A53 Linux cannot be interrupted by MCU MCANs. This solution instantiates a hrtimer with 1 ms polling interval for MCAN device when there is no hardware interrupt and there is poll-interval property in DTB MCAN node. The hrtimer generates a recurring software interrupt which allows to call the isr. The isr will check if there is pending transaction by reading a register and proceed normally if there is. On AM62x, this series enables two MCU MCAN which will use the hrtimer implementation. MCANs with hardware interrupt routed to A53 Linux will continue to use the hardware interrupt as expected. Timer polling method was tested on both classic CAN and CAN-FD at 125 KBPS, 250 KBPS, 1 MBPS and 2.5 MBPS with 4 MBPS bitrate switching. Letency and CPU load benchmarks were tested on 3x MCAN on AM62x. 1 MBPS timer polling interval is the better timer polling interval since it has comparable latency to hardware interrupt with the worse case being 1ms + CAN frame propagation time and CPU load is not substantial. Latency can be improved further with less than 1 ms polling intervals, howerver it is at the cost of CPU usage since CPU load increases at 0.5 ms. Note that in terms of power, enabling MCU MCANs with timer-polling implementation might have negative impact since we will have to wake up every 1 ms whether there are CAN packets pending in the RX FIFO or not. This might prevent the CPU from entering into deeper idle states for extended periods of time. This patch series depends on 'Enable CAN PHY transceiver driver': https://lore.kernel.org/lkml/775ec9ce-7668-429c-a977-6c8995968d6e@app.fastmail.com/T/ Previously sent an RFC: https://lore.kernel.org/linux-can/52a37e51-4143-9017-42ee-8d17c67028e3@ti.com/T/#t Changes since v1: - Add poll-interval property to bindings and MCAN DTB node - Add functionality to check for 'poll-interval' property in MCAN node - Bindings: add an example using poll-interval - Add 'polling' flag in driver to check if device is using polling method - Check for both timer polling and hardware interrupt case, default to hardware interrupt method - Change ns_to_ktime() to ms_to_ktime() Judith Mendez (4): can: m_can: Add hrtimer to generate software interrupt dt-bindings: net: can: Add poll-interval for MCAN arm64: dts: ti: Add AM62x MCAN MAIN domain transceiver overlay arm64: dts: ti: Enable MCU MCANs for AM62x .../bindings/net/can/bosch,m_can.yaml | 26 ++++++++- arch/arm64/boot/dts/ti/Makefile | 2 + arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 ++++++++ .../boot/dts/ti/k3-am625-sk-mcan-main.dtso | 35 ++++++++++++ .../boot/dts/ti/k3-am625-sk-mcan-mcu.dtso | 57 +++++++++++++++++++ drivers/net/can/m_can/m_can.c | 30 ++++++++-- drivers/net/can/m_can/m_can.h | 5 ++ drivers/net/can/m_can/m_can_platform.c | 31 +++++++++- 8 files changed, 200 insertions(+), 10 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-mcu.dtso