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[0/2] MT8192/95: Set correct MSDCPLL rate

Message ID 20230522093002.75137-1-angelogioacchino.delregno@collabora.com (mailing list archive)
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Series MT8192/95: Set correct MSDCPLL rate | expand

Message

AngeloGioacchino Del Regno May 22, 2023, 9:30 a.m. UTC 
This series improves both stability/reliability and performance for
eMMC and SD cards on MT8192 and MT8195, where the PLL may be set at
a sub-optimal rate from the bootloader.

This was tested on MT8192 Asurada Spherion and MT8195 Cherry Tomato
Chromebooks.

AngeloGioacchino Del Regno (2):
  arm64: dts: mediatek: mt8192: Make sure MSDCPLL's rate is 400MHz
  arm64: dts: mediatek: mt8195: Make sure MSDCPLL's rate is 400MHz

 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 ++
 arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 ++
 2 files changed, 4 insertions(+)

Comments

Matthias Brugger May 29, 2023, 4:08 p.m. UTC | #1 
On 22/05/2023 11:30, AngeloGioacchino Del Regno wrote:
> This series improves both stability/reliability and performance for
> eMMC and SD cards on MT8192 and MT8195, where the PLL may be set at
> a sub-optimal rate from the bootloader.
> 
> This was tested on MT8192 Asurada Spherion and MT8195 Cherry Tomato
> Chromebooks.
> 
> AngeloGioacchino Del Regno (2):
>    arm64: dts: mediatek: mt8192: Make sure MSDCPLL's rate is 400MHz
>    arm64: dts: mediatek: mt8195: Make sure MSDCPLL's rate is 400MHz
> 
>   arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 ++
>   arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 ++
>   2 files changed, 4 insertions(+)
> 

Whole series applied, thanks a lot!
Matthias