From patchwork Wed Aug 2 07:36:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Francesco Dolcini X-Patchwork-Id: 13337772 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F8BEC001DE for ; Wed, 2 Aug 2023 07:37:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=5dPUsIEYiqyntQpIx04Ngscs1DgdBKBBIzlqPFNVMLI=; b=HvwXSlFGF/MkvH 7YkrMn0+1l68Yv6SAQ3+oAjkJIF8PWveZFmK9UTI2ycno1D9sfuvVSOmqkqyQDAzTBxsW8Ma95Srx sUIbMH6h5b4hl1y191b8BTx0w4pe3yEYbD3vD9/yfTJIlvUOC93BfSjBKMY/liNTaVff4n4THRZXE mL4gmLq2rR04xKQm8w9Z/jyHIxPQ9N49f2U2kW7QjC6gmBzGxgg+VZd+mGdaFRNTTKIBcfT12q5Io v4fyYz6DYZzB00N0n3Udl2FFhqYGPukpK6em9P3mEUGTdnkLcVAaZ+sGIKm2tglobY9Ipqmg1u/e0 iGiAKEXQXwPYQhCacKcg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qR6Pc-004GP4-0E; Wed, 02 Aug 2023 07:36:52 +0000 Received: from mail11.truemail.it ([2001:4b7e:0:8::81]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qR6PX-004GL2-0N for linux-arm-kernel@lists.infradead.org; Wed, 02 Aug 2023 07:36:50 +0000 Received: from francesco-nb.pivistrello.it (93-49-2-63.ip317.fastwebnet.it [93.49.2.63]) by mail11.truemail.it (Postfix) with ESMTPA id 2A082206F3; Wed, 2 Aug 2023 09:36:39 +0200 (CEST) From: Francesco Dolcini To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Francesco Dolcini , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Judith Mendez Subject: [PATCH v2 0/2] arm64: dts: ti: k3-am62: Add MCU MCAN Date: Wed, 2 Aug 2023 09:36:33 +0200 Message-Id: <20230802073635.11290-1-francesco@dolcini.it> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230802_003647_321665_EE216611 X-CRM114-Status: UNSURE ( 7.06 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Francesco Dolcini On AM62x there are no hardware interrupts routed to A53 GIC interrupt controller for MCU MCAN IPs, so MCU MCAN nodes were omitted from MCU dtsi. Timer polling was introduced in commits [1][2] so now add MCU MCAN nodes to the MCU dtsi for Cortex A53. [1] commit b382380c0d2d ("can: m_can: Add hrtimer to generate software interrupt") [2] commit bb410c03b999 ("dt-bindings: net: can: Remove interrupt properties for MCAN") Once the MCU MCANs are added to the SOC dtsi, enable the Verdin CAN2. v1..v2: - fixed can node name - added commit prefix before sha in commit message Hiago De Franco (1): arm64: dts: ti: k3-am625-verdin: enable CAN_2 Judith Mendez (1): arm64: dts: ti: k3-am62: Add MCU MCAN nodes arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 24 +++++++++++++++++++ .../boot/dts/ti/k3-am62-verdin-dahlia.dtsi | 5 ++++ .../arm64/boot/dts/ti/k3-am62-verdin-dev.dtsi | 5 ++++ .../boot/dts/ti/k3-am62-verdin-yavia.dtsi | 5 ++++ arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 19 +++++++++++++-- 5 files changed, 56 insertions(+), 2 deletions(-)