Message ID | 20230921033631.1298723-1-anshuman.khandual@arm.com (mailing list archive) |
---|---|
Headers | show |
Series | coresight: etm: Make cycle count threshold user configurable | expand |
On Thu, 21 Sep 2023 09:06:28 +0530, Anshuman Khandual wrote: > This series makes ETM TRCCCCTRL based 'cc_threshold' user configurable via > the perf event attribute. But first, this implements an errata work around > affecting ETM TRCIDR3.CCITMIN value on certain cpus, overriding the field. > > This series applies on coresight/for-next/queue. > > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> > Cc: Suzuki K Poulose <suzuki.poulose@arm.com> > Cc: Mike Leach <mike.leach@linaro.org> > Cc: James Clark <james.clark@arm.com> > Cc: Leo Yan <leo.yan@linaro.org> > Cc: Jonathan Corbet <corbet@lwn.net> > Cc: linux-doc@vger.kernel.org > Cc: coresight@lists.linaro.org > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > > [...] Applied, thanks! [1/3] coresight: etm: Override TRCIDR3.CCITMIN on errata affected cpus https://git.kernel.org/coresight/c/0f55b43dedcd [2/3] coresight: etm: Make cycle count threshold user configurable https://git.kernel.org/coresight/c/0cf805fec179 [3/3] Documentation: coresight: Add cc_threshold tunable https://git.kernel.org/coresight/c/2b690bebb569 Best regards,