From patchwork Tue Oct 10 10:40:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 13415174 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5371DCD80A2 for ; Tue, 10 Oct 2023 10:42:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=4R3mBxmtEmXK40tXtJugguBYbYJGQGHfBDbZIeZ4f48=; b=D+NwgCOb7VfYUp o8VeAJH34NmR8yQ5Ydtexe+i52lmjKYxjEMUGsbOk6NTb0BHZSvWLe5+zE8gvH1MfWyazKwZFdRQF Fka4Su1s5tUNmxqYMwhbK77ose3GK/tOiWY2yj5nNfdz5N27m3iXkjcge17XiVV2rlfh3K1W0Vuwo 5rSTOPDUq9aUOWG5Wg74SowWbBi5B7k60tFHNTzHzSV+9Kg2c7UStRvhOSkOZsbfAfXQFM7z+9/AR wTmmFOFZQrxT8spi2ZkLRENAxmOI8Xrn/8BhrQQDVQWs+mOjLmzzvRx3Yg4RS0dIESL6bl+9yLbl/ 5Qrc4d/+y2iHfFCYnTPg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qqABE-00D4U4-2C; Tue, 10 Oct 2023 10:41:36 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qqABB-00D4Tb-0n for linux-arm-kernel@lists.infradead.org; Tue, 10 Oct 2023 10:41:35 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 51FED1FB; Tue, 10 Oct 2023 03:42:11 -0700 (PDT) Received: from localhost.localdomain (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1DFA53F762; Tue, 10 Oct 2023 03:41:28 -0700 (PDT) From: James Clark To: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, suzuki.poulose@arm.com Cc: James Clark , Catalin Marinas , Will Deacon , Jonathan Corbet , Russell King , Marc Zyngier , Oliver Upton , James Morse , Zenghui Yu , Mark Rutland , Zaid Al-Bassam , Geert Uytterhoeven , Reiji Watanabe , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev Subject: [PATCH v2 0/3] arm64: perf: Add support for event counting threshold Date: Tue, 10 Oct 2023 11:40:26 +0100 Message-Id: <20231010104048.1923484-1-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231010_034133_353312_25D06441 X-CRM114-Status: GOOD ( 12.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Changes since v1: * Fix build on aarch32 by disabling FEAT_PMUv3_TH and splitting event type mask between the platforms * Change armv8pmu_write_evtype() to take unsigned long instead of u64 so it isn't unnecessarily wide on aarch32 * Add UL suffix to aarch64 event type mask definition ---- FEAT_PMUv3_TH (Armv8.8) is a new feature that allows conditional counting of PMU events depending on how much the event increments on a single cycle. Two new config fields for perf_event_open have been added, and a PMU cap file for reading the max_threshold. See the second commit message and the docs in the last commit for more details. The change has been validated on the Arm FVP model: # Zero values, works as expected (as before). $ perf stat -e dtlb_walk/threshold=0,threshold_control=0/ -- true 5962 dtlb_walk/threshold=0,threshold_control=0/ # Threshold >= 255 causes count to be 0 because dtlb_walk doesn't # increase by more than 1 per cycle. $ perf stat -e dtlb_walk/threshold=255,threshold_control=5/ -- true 0 dtlb_walk/threshold=255,threshold_control=5/ # Keeping comparison as >= but lowering the threshold to 1 makes the # count return. $ perf stat -e dtlb_walk/threshold=1,threshold_control=5/ -- true 6329 dtlb_walk/threshold=1,threshold_control=5/ James Clark (3): arm: perf: Include threshold control fields valid in PMEVTYPER mask arm64: perf: Add support for event counting threshold Documentation: arm64: Document the PMU event counting threshold feature Documentation/arch/arm64/perf.rst | 58 ++++++++++++++++++++++++++ arch/arm/include/asm/arm_pmuv3.h | 3 ++ arch/arm64/include/asm/arm_pmuv3.h | 4 ++ arch/arm64/kvm/pmu-emul.c | 1 + arch/arm64/kvm/sys_regs.c | 1 + drivers/perf/arm_pmuv3.c | 67 +++++++++++++++++++++++++++++- include/linux/perf/arm_pmuv3.h | 4 +- 7 files changed, 136 insertions(+), 2 deletions(-) base-commit: 94f6f0550c625fab1f373bb86a6669b45e9748b3