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Tue, 17 Oct 2023 12:05:46 -0700 (PDT) Received: from ryzen9.fritz.box ([2a01:2a8:8f03:b001:fe65:a70:2777:ab31]) by smtp.gmail.com with ESMTPSA id bq14-20020a056402214e00b00537963f692esm1637990edb.0.2023.10.17.12.05.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 12:05:46 -0700 (PDT) From: =?utf-8?q?Bernhard_Rosenkr=C3=A4nzer?= To: daniel.lezcano@linaro.org, angelogioacchino.delregno@collabora.com, rafael@kernel.org, amitk@kernel.org, rui.zhang@intel.com, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dunlap@infradead.org, e.xingchen@zte.com.cn, p.zabel@pengutronix.de Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, wenst@chromium.org, ames.lo@mediatek.com, rex-bc.chen@mediatek.com, nfraprado@collabora.com, abailon@baylibre.com, amergnat@baylibre.com, khilman@baylibre.com Subject: [PATCH v5 0/5] Add LVTS support for mt8192 Date: Tue, 17 Oct 2023 21:05:40 +0200 Message-ID: <20231017190545.157282-1-bero@baylibre.com> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231017_120552_202259_9E04422F X-CRM114-Status: GOOD ( 11.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add full LVTS support (MCU thermal domain + AP thermal domain) to MediaTek MT8192 SoC. Also, add Suspend and Resume support to LVTS Driver (all SoCs), and update the documentation that describes the Calibration Data Offsets. v5 changes are a lot smaller than originally assumed -- commit 185673ca71d3f7e9c7d62ee5084348e084352e56 fixed the issue I was originally planning to work around in this patchset, so what remains for v5 is noirq and cosmetics. Changelog: v5 : - Suspend/Resume in noirq stage - Reorder chipset specific functions - Rebased : base-commit: 4d5ab2376ec576af173e5eac3887ed0b51bd8566 v4 : - Shrink the lvts_ap thermal sensor I/O range to 0xc00 to make room for SVS support, pointed out by AngeloGioacchino Del Regno v3 : - Rebased : base-commit: 6a3d37b4d885129561e1cef361216f00472f7d2e - Fix issues in v2 pointed out by Nícolas F. R. A. Prado : Use filtered mode to make sure threshold interrupts are triggered, protocol documentation, cosmetics - I (bero@baylibre.com) will be taking care of this patchset from now on, since Balsam has left BayLibre. Thanks for getting it almost ready, Balsam! v2 : - Based on top of thermal/linux-next : base-commit: 7ac82227ee046f8234471de4c12a40b8c2d3ddcc - Squash "add thermal zones and thermal nodes" and "add temperature mitigation threshold" commits together to form "arm64: dts: mediatek: mt8192: Add thermal nodes and thermal zones" commit. - Add Suspend and Resume support to LVTS Driver. - Update Calibration Data documentation. - Fix calibration data offsets for mt8192 (Thanks to "Chen-Yu Tsai" and "Nícolas F. R. A. Prado"). https://lore.kernel.org/all/20230425133052.199767-1-bchihi@baylibre.com/ Tested-by: Chen-Yu Tsai v1 : - The initial series "Add LVTS support for mt8192" : "https://lore.kernel.org/all/20230307163413.143334-1-bchihi@baylibre.com/". Balsam CHIHI (5): dt-bindings: thermal: mediatek: Add LVTS thermal controller definition for mt8192 thermal/drivers/mediatek/lvts_thermal: Add suspend and resume thermal/drivers/mediatek/lvts_thermal: Add mt8192 support arm64: dts: mediatek: mt8192: Add thermal nodes and thermal zones thermal/drivers/mediatek/lvts_thermal: Update calibration data documentation arch/arm64/boot/dts/mediatek/mt8192.dtsi | 454 ++++++++++++++++++ drivers/thermal/mediatek/lvts_thermal.c | 163 ++++++- .../thermal/mediatek,lvts-thermal.h | 19 + 3 files changed, 634 insertions(+), 2 deletions(-)