Message ID | 20231030-ipq5332-nsscc-v1-0-6162a2c65f0a@quicinc.com (mailing list archive) |
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Mon, 30 Oct 2023 09:47:29 GMT Received: from hu-kathirav-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 30 Oct 2023 02:47:24 -0700 From: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> Subject: [PATCH 0/8] Add NSS clock controller support for IPQ5332 Date: Mon, 30 Oct 2023 15:17:15 +0530 Message-ID: <20231030-ipq5332-nsscc-v1-0-6162a2c65f0a@quicinc.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAKN7P2UC/x3MQQqAIBBA0avIrBPUyUVdJVqITTUbMwciEO+et HyL/ysIFSaBWVUo9LDwlTrsoCCeIR2keesGZxxag0Zzvj2i00kkRh0oxImsRzN66E0utPP7/5a 1tQ9Y0EenXwAAAA== To: Bjorn Andersson <andersson@kernel.org>, Andy Gross <agross@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Richard Cochran <richardcochran@gmail.com>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org> CC: <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <netdev@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, "Kathiravan Thirumoorthy" <quic_kathirav@quicinc.com> X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org |
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Add NSS clock controller support for IPQ5332
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Add bindings, driver and devicetree node for networking sub system clock controller on IPQ5332. Some of the nssnoc clocks present in GCC driver is enabled by default and its RCG is configured by bootloaders, so drop those clocks from GCC driver. The NSS clock controller driver depends on the below patchset which adds support for multiple configurations for same frequency. https://lore.kernel.org/linux-arm-msm/20230531222654.25475-1-ansuelsmth@gmail.com/ Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> --- Kathiravan Thirumoorthy (8): clk: qcom: ipq5332: drop the few nssnoc clocks dt-bindings: clock: ipq5332: drop the few nss clocks definition dt-bindings: clock: ipq5332: add definition for GPLL0_OUT_AUX clock clk: qcom: ipq5332: add gpll0_out_aux clock dt-bindings: clock: add IPQ5332 NSSCC clock and reset definitions clk: qcom: add NSS clock Controller driver for IPQ5332 arm64: dts: qcom: ipq5332: add support for the NSSCC arm64: defconfig: build NSS Clock Controller driver for IPQ5332 .../bindings/clock/qcom,ipq5332-nsscc.yaml | 60 ++ arch/arm64/boot/dts/qcom/ipq5332.dtsi | 28 + arch/arm64/configs/defconfig | 1 + drivers/clk/qcom/Kconfig | 7 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-ipq5332.c | 71 +- drivers/clk/qcom/nsscc-ipq5332.c | 1035 ++++++++++++++++++++ include/dt-bindings/clock/qcom,ipq5332-gcc.h | 4 +- include/dt-bindings/clock/qcom,ipq5332-nsscc.h | 86 ++ 9 files changed, 1233 insertions(+), 60 deletions(-) --- base-commit: c503e3eec382ac708ee7adf874add37b77c5d312 change-id: 20231030-ipq5332-nsscc-aeac9e153045 Best regards,