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Tue, 21 Nov 2023 14:31:06 GMT Received: from hu-kathirav-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 21 Nov 2023 06:31:01 -0800 From: Kathiravan Thirumoorthy Subject: [PATCH v2 0/9] Add NSS clock controller support for Qualcomm IPQ5332 Date: Tue, 21 Nov 2023 20:00:42 +0530 Message-ID: <20231121-ipq5332-nsscc-v2-0-a7ff61beab72@quicinc.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIABK/XGUC/3XMQQ7CIBCF4as0sxYDg5DoynuYLsg4tbOQtlCJp uHuYvcu/5e8b4PMSTjDpdsgcZEsU2yBhw5oDPHBSu6tATVao61WMi/OWlQxZyIVONCZjbP65KB 95sSDvHfv1rceJa9T+ux8wd/6TypGaeWNx4Dk3aDDdXkJSaQjTU/oa61fCwFL1qwAAAA= To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Catalin Marinas , Will Deacon CC: , , , , , , "Kathiravan Thirumoorthy" , Krzysztof Kozlowski X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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Some of the nssnoc clocks present in GCC driver is enabled by default and its RCG is configured by bootloaders, so enable those clocks in driver probe. The NSS clock controller driver depends on the below patchset which adds support for multiple configurations for same frequency. https://lore.kernel.org/linux-arm-msm/20230531222654.25475-1-ansuelsmth@gmail.com/ Signed-off-by: Kathiravan Thirumoorthy --- Changes in v2: - Change logs are in respective patches - Link to v1: https://lore.kernel.org/r/20231030-ipq5332-nsscc-v1-0-6162a2c65f0a@quicinc.com --- Kathiravan Thirumoorthy (9): clk: qcom: ipq5332: add const qualifier to the clk_init_data structure clk: qcom: ipq5332: enable few nssnoc clocks in driver probe dt-bindings: clock: ipq5332: drop the few nss clocks definition dt-bindings: clock: ipq5332: add definition for GPLL0_OUT_AUX clock clk: qcom: ipq5332: add gpll0_out_aux clock dt-bindings: clock: add Qualcomm IPQ5332 NSSCC clock and reset definitions clk: qcom: add NSS clock Controller driver for Qualcomm IPQ5332 arm64: dts: qcom: ipq5332: add support for the NSSCC arm64: defconfig: build NSS Clock Controller driver for Qualcomm IPQ5332 .../bindings/clock/qcom,ipq5332-nsscc.yaml | 60 ++ arch/arm64/boot/dts/qcom/ipq5332.dtsi | 28 + arch/arm64/configs/defconfig | 1 + drivers/clk/qcom/Kconfig | 7 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-ipq5332.c | 122 +-- drivers/clk/qcom/nsscc-ipq5332.c | 1035 ++++++++++++++++++++ include/dt-bindings/clock/qcom,ipq5332-gcc.h | 4 +- include/dt-bindings/clock/qcom,ipq5332-nsscc.h | 86 ++ 9 files changed, 1264 insertions(+), 80 deletions(-) --- base-commit: 07b677953b9dca02928be323e2db853511305fa9 change-id: 20231030-ipq5332-nsscc-aeac9e153045 Best regards,