From patchwork Tue Nov 28 09:49:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 13470750 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92227C4167B for ; Tue, 28 Nov 2023 09:50:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=BLoUvl4bxlr9jtNR/cf7RrHny0+mYtVCjek0I2lS1b0=; b=DYhM/3nj+C2es8 jF5ZbHZYj+ss1d1rvR3ghZqbi9p1qXaArez+w5EgGTyfUWbhHQmjikMtwjnxQn6Xb+EzxGBnY3WyQ mKL/r0Burc8PMpzNsxE/Qv2dM7FU86RrPc/Pj5R0YdhVG3ql/u5RhZ6wRX3N8auID/Z8+mjGWp/PH GQOVX0L7Lcq+V2dPRQIRZpJaCRS3ed/G7WBMgheiBIGxQh1SOTGyTBcrg8yV+jvFz2sT5vYlnW/n+ tMjAF0F8/YbvIFH3J/swa1L4FbyNyUDhIWGh3fQoC0HwA0Zs8lQHNxQp4z0XTa6KSulm/sU8nnT88 hdJbK/EViUWFjPksSk8A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r7ujV-004meG-09; Tue, 28 Nov 2023 09:50:21 +0000 Received: from frasgout.his.huawei.com ([185.176.79.56]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r7ujQ-004mcs-2y for linux-arm-kernel@lists.infradead.org; Tue, 28 Nov 2023 09:50:19 +0000 Received: from mail.maildlp.com (unknown [172.18.186.231]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4Sfd3J1D92z6JB75; Tue, 28 Nov 2023 17:49:48 +0800 (CST) Received: from lhrpeml500005.china.huawei.com (unknown [7.191.163.240]) by mail.maildlp.com (Postfix) with ESMTPS id 837C2140135; Tue, 28 Nov 2023 17:50:04 +0800 (CST) Received: from A2006125610.china.huawei.com (10.202.227.178) by lhrpeml500005.china.huawei.com (7.191.163.240) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 28 Nov 2023 09:49:57 +0000 From: Shameer Kolothum To: , CC: , , , , , , , , , , , Subject: [PATCH 0/5] iommu/smmuv3: Add IOMMUFD dirty tracking support for SMMUv3 Date: Tue, 28 Nov 2023 09:49:35 +0000 Message-ID: <20231128094940.1344-1-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.202.227.178] X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To lhrpeml500005.china.huawei.com (7.191.163.240) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231128_015017_103182_6AA8E37F X-CRM114-Status: UNSURE ( 7.88 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, This is revisiting the earlier attempts [1, 2] to use SMMUv3 HTTU feature for dirty page tracking. The Intel/AMD support is already mainline. The code is now based on the new IOMMUFD APIs and is rebased on Jason's SMMUv3 driver refactor series[3]. One major change is in patch #3 where the IO PTE walker code is modified to take care of any iova size instead of iommu pgsize, This is tested using a Qemu branch based on "vfio: Adopt iommufd" v4 series[4]. Basic sanity tests are done using an emulation setup and on a test hardware setup. Block page split/merge(BBML) is not part of this series. I am planning to send it separately. Complete git branches are here, https://github.com/hisilicon/kernel-dev/tree/smmuv3_newapi-dbm-arm https://github.com/hisilicon/qemu/tree/iommufd_cdev_v4-dbm-arm Please take a look and let me know your feedback. Thanks, Shameer 1. https://lore.kernel.org/lkml/20210413085457.25400-1-zhukeqian1@huawei.com/ 2. https://lore.kernel.org/linux-iommu/20230518204650.14541-1-joao.m.martins@oracle.com/ 3. https://lore.kernel.org/all/0-v2-de8b10590bf5+400-smmuv3_newapi_p1_jgg@nvidia.com/ 4. https://lore.kernel.org/qemu-devel/20231102071302.1818071-1-zhenzhong.duan@intel.com/ Jean-Philippe Brucker (1): iommu/arm-smmu-v3: Add feature detection for HTTU Joao Martins (2): iommu/arm-smmu-v3: Add set_dirty_tracking() support iommu/arm-smmu-v3: Enforce dirty tracking in domain attach/alloc Keqian Zhu (1): iommu/arm-smmu-v3: Add read_and_clear_dirty() support Kunkun Jiang (1): iommu/arm-smmu-v3: Enable HTTU for stage1 with io-pgtable mapping drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 115 +++++++++++++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 8 ++ drivers/iommu/io-pgtable-arm.c | 125 +++++++++++++++++++- include/linux/io-pgtable.h | 4 + 4 files changed, 249 insertions(+), 3 deletions(-)