From patchwork Fri Dec 1 08:20:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhavya Kapoor X-Patchwork-Id: 13475519 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE499C10F04 for ; Fri, 1 Dec 2023 08:21:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=OYQEihSJiF/K/GeBijlbxFLrG0TEMLfbexKmjJPMyIs=; b=klQq2OfaqrKOc3 L2jSb0g/HrNjQaREiAZx94F2cnHROztR1kw2h7x2wBbqjrgA6vxER3wxWh4gzF5rl5pA2q3oGpwyS UiBP2fo60DnQkFB8DD+7Jdc+OmB0xJDJjHlUOobdkNdnPVHtdmjdJZuwTeCHUkkNhHmbZFrldgwBM AezmrtDsm4DvZLj5Euujpl9UsipIiFIogvG+gcb7mXew9uBvcl6TeO9dhO8bLqJTwGZc0PqDhR8Vz m2Tsx2FXsImIxbPSxbOH6Fo72IUPVDBY6OKjGwl1kCVi8f+ssv/+C4M9lpHvLvHg4okBT7d64bF+M NoWEnOfky2hZG6h87zTA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1r8ylc-00Cx8B-05; Fri, 01 Dec 2023 08:20:56 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1r8ylY-00Cx6h-2x for linux-arm-kernel@lists.infradead.org; Fri, 01 Dec 2023 08:20:54 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3B18KkJt117998; Fri, 1 Dec 2023 02:20:46 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1701418846; bh=DJncCBeXfr2wI08BAiTIZthGqiZyXSwntyS7s1P3QJM=; h=From:To:CC:Subject:Date; b=GRjaGjoNmwlhgqGmlSwk5b/WMClqMKUgebQnj4MDHHTtRoJWkAYR4mPT5D+wNKuNp A5GWHKt+MeOEJZFLcACzPaE48Lf7TgHGhnq5K3iOhWOudXWb0vnei8HcU6KeFCbMjw wq5ft4DzunSmktwEXHUEZhGBXwoLpL50nMi36Op0= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3B18Kkik006061 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 1 Dec 2023 02:20:46 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 1 Dec 2023 02:20:46 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 1 Dec 2023 02:20:46 -0600 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3B18KjMO032651; Fri, 1 Dec 2023 02:20:46 -0600 From: Bhavya Kapoor To: , , CC: , , , , , , Subject: [PATCH 0/3] arm64: dts: ti: Add Itap Delay Value For High Speed DDR Date: Fri, 1 Dec 2023 13:50:42 +0530 Message-ID: <20231201082045.790478-1-b-kapoor@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231201_002053_052689_83313E5D X-CRM114-Status: UNSURE ( 7.09 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This Series adds Itap Delay Value for DDR52 speed mode for eMMC in J7200 and for DDR50 speed mode for MMCSD in J721s2 and J784s4 SoC. Rebased to next-20231201 Bhavya Kapoor (3): arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed mode arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 speed mode arm64: dts: ti: k3-j784s4-main: Add Itap Delay Value For DDR50 speed mode arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 1 + arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 1 + arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 1 + 3 files changed, 3 insertions(+) Reviewed-by: Udit Kumar