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Mon, 19 Feb 2024 08:09:51 -0800 (PST) Received: from prasmi.home ([2a00:23c8:2500:a01:3c2e:cd45:f50f:f083]) by smtp.gmail.com with ESMTPSA id l14-20020a7bc44e000000b00411d1ce4f9dsm11592670wmi.34.2024.02.19.08.09.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Feb 2024 08:09:50 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 0/4] Add new Renesas RZ/V2H SoC Date: Mon, 19 Feb 2024 16:09:08 +0000 Message-Id: <20240219160912.1206647-1-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240219_080954_430258_9E30A044 X-CRM114-Status: GOOD ( 12.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Lad Prabhakar Hi, This patch series adds initial support for RZ/V2H{P} (R9A09G057) SoC identification. The RZ/V2H{P} SoC is equipped with a Quad 64-bit Arm Cortex-A55 core (up to 1.8 GHz), dual 32-bit Arm Cortex R8 core (up to 800 MHz) and a 32-bit Arm Cortex M33 core (up to 200 MHz). It supports the below IP blocks/Features: - Boot * Selectable boot CPU from Cortex-M33 or Cortex-A55 - Accelerated engines * AI accelerator (dynamically reconfigurable processor for AI (DRP-AI)) * Dynamic re-configurable processor (DRP) * 3D graphics engine (GE3D MALI-G31) (optional) * Image signal processing (ISP MALI-C55) (optional) * Image scaling unit (ISU) * Video codec unit (VCU) - On-chip SRAM and external memory interfaces * On-chip share SRAM (6-Mbyte with ECC) * 2-channel memory controller for LPDDR4-3200 or LPDDR4X-3200 with a 32-bit bus width * xSPI interface * SDHI (eMMC/SD - 3ch) - Timers * 32-bit general purpose timers (16 ch) * 32-bit CMTW (8 ch) * 32-bit GTM (8 ch) * RTC * WDT (4 ch) - Communication/storage /network interface * Ethernet (2 ch: 10/100/1000 BASE) * USB2.0 (1 ch: Host/Function, 1 ch: Host only) * USB3.2 Gen2 (2 ch: Host only) * PCIe Gen3 (1/2/4 lanes) * MIPI CSI2 (4 ch: 1/2/4 lanes) * MIPI DSI (1ch: 1/2/4 lanes) * CAN/CANFD (6 ch) * SCI (10 ch: UART/SPI/I2C) * SCIF (1 ch) * SPI (3 ch) * I2C (9 ch) * I3C (1 ch) - Audio * Asynchronous sampling rate converter unit (SCU) (up to 192 kHz) * DMAC for Audio (ADMAC) is available to transfer audio formats of I2S with SCU. * Flexible audio clock generator (ADG) for audio functions. * I2S (TDM) input/output interfaces (half-duplex 10 ch.; full-duplex 5 ch.) * SPDIF input/output interfaces (3 ch.) * Pulse density modulation (PDM) input interfaces (6 ch.) - Analogue/Digital converter and sensors * 2.5 Msps 12-bit ADC (8 ch) * Internal temperature sensors (2 ch) - Security * Hardware cryptographic engine (optional) Logs: ~ # uname -ra Linux rz/v2h 6.8.0-rc5+ #167 SMP PREEMPT Mon Feb 19 10:42:01 GMT 2024 aarch64 GNU/Linux ~ # ~ # for i in machine family soc_id revision; do echo -n "$i: ";cat /sys/devices/ soc0/$i; done machine: Renesas EVK based on r9a09g057h44 family: RZ/V2H soc_id: r9a09g057 revision: 0 ~ # cat /proc/cpuinfo processor : 0 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 1 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 2 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 processor : 3 BogoMIPS : 48.00 Features : fp asimd evtstrm crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x2 CPU part : 0xd05 CPU revision : 0 ~ # cat /proc/meminfo MemTotal: 16240544 kB MemFree: 16201748 kB MemAvailable: 16073696 kB Buffers: 0 kB Cached: 2040 kB SwapCached: 0 kB Active: 0 kB Inactive: 68 kB Active(anon): 0 kB Inactive(anon): 68 kB Active(file): 0 kB Inactive(file): 0 kB Unevictable: 2040 kB Mlocked: 0 kB SwapTotal: 0 kB SwapFree: 0 kB Dirty: 0 kB Writeback: 0 kB AnonPages: 84 kB Mapped: 1456 kB Shmem: 0 kB KReclaimable: 2924 kB Slab: 8720 kB SReclaimable: 2924 kB SUnreclaim: 5796 kB KernelStack: 1056 kB PageTables: 40 kB SecPageTables: 0 kB NFS_Unstable: 0 kB Bounce: 0 kB WritebackTmp: 0 kB CommitLimit: 8120272 kB Committed_AS: 648 kB VmallocTotal: 133141626880 kB VmallocUsed: 1264 kB VmallocChunk: 0 kB Percpu: 352 kB HardwareCorrupted: 0 kB AnonHugePages: 0 kB ShmemHugePages: 0 kB ShmemPmdMapped: 0 kB FileHugePages: 0 kB FilePmdMapped: 0 kB CmaTotal: 32768 kB CmaFree: 26624 kB HugePages_Total: 0 HugePages_Free: 0 HugePages_Rsvd: 0 HugePages_Surp: 0 Hugepagesize: 2048 kB Hugetlb: 0 kB ~ # cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 11: 3426 66 291 243 GICv3 27 Level arch_timer 13: 0 0 0 0 GICv3 561 Level 11c01400.serial:rx err 14: 15 0 0 0 GICv3 564 Level 11c01400.serial:rx full 15: 1259 0 0 0 GICv3 565 Level 11c01400.serial:tx empty 16: 0 0 0 0 GICv3 562 Level 11c01400.serial:break 17: 82 0 0 0 GICv3 566 Level 11c01400.serial:rx ready 18: 0 0 0 0 GICv3 563 Level 11c01400.serial:tx end IPI0: 5 20 8 23 Rescheduling interrupts IPI1: 530 204 91 155 Function call interrupts IPI2: 0 0 0 0 CPU stop interrupts IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts IPI4: 0 0 0 0 Timer broadcast interrupts IPI5: 0 0 0 0 IRQ work interrupts Err: 0 ~ # Cheers, Prabhakar Lad Prabhakar (4): dt-bindings: soc: renesas: Document Renesas RZ/V2H{P} SoC variants dt-bindings: arm: renesas: Document Renesas RZ/V2H{P} System Controller soc: renesas: Add identification support for RZ/V2H SoC arm64: defconfig: Enable R9A09G057 SoC .../soc/renesas/renesas,r9a09g057-sys.yaml | 59 +++++++++++++++++++ .../bindings/soc/renesas/renesas.yaml | 8 +++ arch/arm64/configs/defconfig | 1 + drivers/soc/renesas/Kconfig | 5 ++ drivers/soc/renesas/renesas-soc.c | 20 ++++++- 5 files changed, 92 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g057-sys.yaml