From patchwork Tue Feb 20 06:07:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 13563415 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84611C48BC4 for ; Tue, 20 Feb 2024 06:08:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=2oCFSH4cLIYf2BS1/5BRsqVmDhAXHJwlSdRh7cVk4f4=; b=RQOvlvHTAihGMN 0R71NMVxjNzBO8Bah1w3oEqxZjrEp1h2cTsNz2Y+TyxaF0fahYj9rEyhY4bHJKFGxPflWqGKr8uB8 hveBwWfxW5bdsWzcyZzHQaeU3clPKEPRR9dexyF2eplsu13CD0hsU75tNNbFdEdFcxYYr4B3BM1QK 0qffa1QlleHaoqQaxYaXIXrmJ10PtoZwvEI4jMUAAlis48A1QT255uEBQMtiGan2C77X+3cO9YnhH 5LJvadme4P6cK+38HlClk0tCS3R95hqUDY4x476Mmrq6kADx4mat0HdI/Bi5SPL/P4bdLfjOkiXUm xlUP2kEGup3EgLRM6Ogw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rcJIJ-0000000DHZq-0csW; Tue, 20 Feb 2024 06:07:55 +0000 Received: from mail-pl1-x62d.google.com ([2607:f8b0:4864:20::62d]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rcJIE-0000000DHY5-1HEG for linux-arm-kernel@lists.infradead.org; Tue, 20 Feb 2024 06:07:51 +0000 Received: by mail-pl1-x62d.google.com with SMTP id d9443c01a7336-1d944e8f367so41076125ad.0 for ; Mon, 19 Feb 2024 22:07:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1708409267; x=1709014067; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=0YVdnjJeimj40wibFoyauF5ibuRAflwBB88FmlDpwts=; b=UM2Zq84pstYcB6Fg/cmxK6p+5eKgoyJvOrD0TkgaI89oJg4NdqGnUiM/944KkapQle 3iQ0ayweW5ZU/WZMZkVT+5plgytoweG21+JsbqTX4dkk8KEzYcNXMNZEuv5pv+1emzpY cgoIk+HnbhqLOzNaovOpmRv3NC3wr5aBPCU3zyqF5or6wWidbvblzwy2bq5dUZ85UIoB mQ9Jn3FTGU1TZQRpcVrrBaBVdHvrLIEGJFCeiuvn+BqSuGQDDx8uKhgBvKJddVhGYJ9I DuwKBBasZt2w7ox8X3P1hmEtTsBPvHu/WRnRNg65q1X7/5Jl2RBZ6dPNEgG4jXeEYpae rTDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708409267; x=1709014067; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=0YVdnjJeimj40wibFoyauF5ibuRAflwBB88FmlDpwts=; b=Xb16GlpZezbY57x5t1sHPlA31XoLQhiv9XOQu4rVjk7EdLlnfITCSyUsgmLYY8GTXc xtCMH6kBrqJo1DqQeIl8mL7qypFPBSt3LQERlsrOdoII2zU0mHA/loMeXkK4jE9ZpPsM ZDglZq2ZRw7fpeU0rruVVa90E5kLDTYphKosf5s6W93J5haY1EQoUPXIbyGqRMdwmNVf 1IEsrLry4iZ74d+x81DAMcaKOVG4VKgAAjCJkcFYSFVAx+dBrjQwk3i5d9AzfszE6kYK sI4NZvXQFLx6Hkds9NxHiKuk2u95EAcq9zMAtyBXAM075PzejTa1Sh4WiR7cRMgnXenn nOxw== X-Forwarded-Encrypted: i=1; AJvYcCV3owZIMRGsZj2UWNxwDMr5h8bNQkW3qLfixEHLqFRtaFsrYyACCuz3M7opFM5Xvdxn4DgUlBxO3LnU9txBiAafwnCtY51t31bVIbL8PoMF0wnZjdw= X-Gm-Message-State: AOJu0YyVyVkx8vwSpxOaO4Gw7YKvKcSIlBybiPSZkAGWrHnOBEq0ag0h s9dm7Mq0l+EyzoppPweoaWFFX9UXpsRoyKjDW6sDdPPpKIuEiHq7wWuWi/W+uHs= X-Google-Smtp-Source: AGHT+IEZOnfWmZrEAL1zxVz5Bow/KcKL3MOUAYpY1SKznddPZfU4vtsXbvx7pEaPB2wx9uYZNv2OLA== X-Received: by 2002:a17:902:e806:b0:1db:c6a0:d023 with SMTP id u6-20020a170902e80600b001dbc6a0d023mr8452556plg.8.1708409266390; Mon, 19 Feb 2024 22:07:46 -0800 (PST) Received: from anup-ubuntu-vm.localdomain ([171.76.80.86]) by smtp.gmail.com with ESMTPSA id j6-20020a17090276c600b001db4c89aea5sm5368114plt.158.2024.02.19.22.07.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Feb 2024 22:07:45 -0800 (PST) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Frank Rowand , Conor Dooley Cc: Marc Zyngier , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Atish Patra , Andrew Jones , Sunil V L , Saravana Kannan , Anup Patel , linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel Subject: [PATCH v13 00/13] Linux RISC-V AIA Support Date: Tue, 20 Feb 2024 11:37:05 +0530 Message-Id: <20240220060718.823229-1-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240219_220750_376058_2DE3A410 X-CRM114-Status: GOOD ( 26.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The RISC-V AIA specification is ratified as-per the RISC-V international process. The latest ratified AIA specifcation can be found at: https://github.com/riscv/riscv-aia/releases/download/1.0/riscv-interrupts-1.0.pdf At a high-level, the AIA specification adds three things: 1) AIA CSRs - Improved local interrupt support 2) Incoming Message Signaled Interrupt Controller (IMSIC) - Per-HART MSI controller - Support MSI virtualization - Support IPI along with virtualization 3) Advanced Platform-Level Interrupt Controller (APLIC) - Wired interrupt controller - In MSI-mode, converts wired interrupt into MSIs (i.e. MSI generator) - In Direct-mode, injects external interrupts directly into HARTs For an overview of the AIA specification, refer the AIA virtualization talk at KVM Forum 2022: https://static.sched.com/hosted_files/kvmforum2022/a1/AIA_Virtualization_in_KVM_RISCV_final.pdf https://www.youtube.com/watch?v=r071dL8Z0yo To test this series, use QEMU v7.2 (or higher) and OpenSBI v1.2 (or higher). This series depends upon per-device MSI domain patches merged by Thomas (tglx) which are available in irq/msi branch at: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git These patches can also be found in the riscv_aia_v13 branch at: https://github.com/avpatel/linux.git Changes since v12: - Rebased on Linux-6.8-rc5 - Dropped per-device MSI domain patches which are already merged by Thomas (tglx) - Addressed nit comments from Thomas and Clement - Added a new patch2 to fix lock dependency warning - Replaced local sync IPI in the IMSIC driver with per-CPU timer - Simplified locking in the IMSIC driver to avoid lock dependency issues - Added a dirty bitmap in the IMSIC driver to optimize per-CPU local sync loop Changes since v11: - Rebased on Linux-6.8-rc1 - Included kernel/irq related patches from "genirq, irqchip: Convert ARM MSI handling to per device MSI domains" series by Thomas. (PATCH7, PATCH8, PATCH9, PATCH14, PATCH16, PATCH17, PATCH18, PATCH19, PATCH20, PATCH21, PATCH22, PATCH23, and PATCH32 of https://lore.kernel.org/linux-arm-kernel/20221121135653.208611233@linutronix.de/) - Updated APLIC MSI-mode driver to use the new WIRED_TO_MSI mechanism. - Updated IMSIC driver to support per-device MSI domains for PCI and platform devices. Changes since v10: - Rebased on Linux-6.6-rc7 - Dropped PATCH3 of v10 series since this has been merged by MarcZ for Linux-6.6-rc7 - Changed the IMSIC ID management strategy from 1-n approach to x86-style 1-1 approach Changes since v9: - Rebased on Linux-6.6-rc4 - Use builtin_platform_driver() in PATCH5, PATCH9, and PATCH12 Changes since v8: - Rebased on Linux-6.6-rc3 - Dropped PATCH2 of v8 series since we won't be requiring riscv_get_intc_hartid() based on Marc Z's comments on ACPI AIA support. - Addressed Saravana's comments in PATCH3 of v8 series - Update PATCH9 and PATCH13 of v8 series based on comments from Sunil Changes since v7: - Rebased on Linux-6.6-rc1 - Addressed comments on PATCH1 of v7 series and split it into two PATCHes - Use DEFINE_SIMPLE_PROP() in PATCH2 of v7 series Changes since v6: - Rebased on Linux-6.5-rc4 - Updated PATCH2 to use IS_ENABLED(CONFIG_SPARC) instead of !IS_ENABLED(CONFIG_OF_IRQ) - Added new PATCH4 to fix syscore registration in PLIC driver - Update PATCH5 to convert PLIC driver into full-blown platform driver with a re-written probe function. Changes since v5: - Rebased on Linux-6.5-rc2 - Updated the overall series to ensure that only IPI, timer, and INTC drivers are probed very early whereas rest of the interrupt controllers (such as PLIC, APLIC, and IMISC) are probed as regular platform drivers. - Renamed riscv_fw_parent_hartid() to riscv_get_intc_hartid() - New PATCH1 to add fw_devlink support for msi-parent DT property - New PATCH2 to ensure all INTC suppliers are initialized which in-turn fixes the probing issue for PLIC, APLIC and IMSIC as platform driver - New PATCH3 to use platform driver probing for PLIC - Re-structured the IMSIC driver into two separate drivers: early and platform. The IMSIC early driver (PATCH7) only initialized IMSIC state and provides IPIs whereas the IMSIC platform driver (PATCH8) is probed provides MSI domain for platform devices. - Re-structure the APLIC platform driver into three separe sources: main, direct mode, and MSI mode. Changes since v4: - Rebased on Linux-6.5-rc1 - Added "Dependencies" in the APLIC bindings (PATCH6 in v4) - Dropped the PATCH6 which was changing the IOMMU DMA domain APIs - Dropped use of IOMMU DMA APIs in the IMSIC driver (PATCH4) Changes since v3: - Rebased on Linux-6.4-rc6 - Dropped PATCH2 of v3 series instead we now set FWNODE_FLAG_BEST_EFFORT via IRQCHIP_DECLARE() - Extend riscv_fw_parent_hartid() to support both DT and ACPI in PATCH1 - Extend iommu_dma_compose_msi_msg() instead of adding iommu_dma_select_msi() in PATCH6 - Addressed Conor's comments in PATCH3 - Addressed Conor's and Rob's comments in PATCH7 Changes since v2: - Rebased on Linux-6.4-rc1 - Addressed Rob's comments on DT bindings patches 4 and 8. - Addessed Marc's comments on IMSIC driver PATCH5 - Replaced use of OF apis in APLIC and IMSIC drivers with FWNODE apis this makes both drivers easily portable for ACPI support. This also removes unnecessary indirection from the APLIC and IMSIC drivers. - PATCH1 is a new patch for portability with ACPI support - PATCH2 is a new patch to fix probing in APLIC drivers for APLIC-only systems. - PATCH7 is a new patch which addresses the IOMMU DMA domain issues pointed out by SiFive Changes since v1: - Rebased on Linux-6.2-rc2 - Addressed comments on IMSIC DT bindings for PATCH4 - Use raw_spin_lock_irqsave() on ids_lock for PATCH5 - Improved MMIO alignment checks in PATCH5 to allow MMIO regions with holes. - Addressed comments on APLIC DT bindings for PATCH6 - Fixed warning splat in aplic_msi_write_msg() caused by zeroed MSI message in PATCH7 - Dropped DT property riscv,slow-ipi instead will have module parameter in future. Anup Patel (12): irqchip/sifive-plic: Convert PLIC driver into a platform driver irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore irqchip/riscv-intc: Add support for RISC-V AIA dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller irqchip: Add RISC-V incoming MSI controller early driver irqchip/riscv-imsic: Add device MSI domain support for platform devices irqchip/riscv-imsic: Add device MSI domain support for PCI devices dt-bindings: interrupt-controller: Add RISC-V advanced PLIC irqchip: Add RISC-V advanced PLIC driver for direct-mode irqchip/riscv-aplic: Add support for MSI-mode RISC-V: Select APLIC and IMSIC drivers MAINTAINERS: Add entry for RISC-V AIA drivers Björn Töpel (1): genirq/matrix: Dynamic bitmap allocation .../interrupt-controller/riscv,aplic.yaml | 172 ++++ .../interrupt-controller/riscv,imsics.yaml | 172 ++++ MAINTAINERS | 14 + arch/riscv/Kconfig | 2 + arch/x86/include/asm/hw_irq.h | 2 - drivers/irqchip/Kconfig | 25 + drivers/irqchip/Makefile | 3 + drivers/irqchip/irq-riscv-aplic-direct.c | 324 +++++++ drivers/irqchip/irq-riscv-aplic-main.c | 211 ++++ drivers/irqchip/irq-riscv-aplic-main.h | 52 + drivers/irqchip/irq-riscv-aplic-msi.c | 263 +++++ drivers/irqchip/irq-riscv-imsic-early.c | 213 ++++ drivers/irqchip/irq-riscv-imsic-platform.c | 378 ++++++++ drivers/irqchip/irq-riscv-imsic-state.c | 906 ++++++++++++++++++ drivers/irqchip/irq-riscv-imsic-state.h | 99 ++ drivers/irqchip/irq-riscv-intc.c | 34 +- drivers/irqchip/irq-sifive-plic.c | 285 ++++-- include/linux/irqchip/riscv-aplic.h | 145 +++ include/linux/irqchip/riscv-imsic.h | 87 ++ kernel/irq/matrix.c | 28 +- 20 files changed, 3298 insertions(+), 117 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml create mode 100644 Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml create mode 100644 drivers/irqchip/irq-riscv-aplic-direct.c create mode 100644 drivers/irqchip/irq-riscv-aplic-main.c create mode 100644 drivers/irqchip/irq-riscv-aplic-main.h create mode 100644 drivers/irqchip/irq-riscv-aplic-msi.c create mode 100644 drivers/irqchip/irq-riscv-imsic-early.c create mode 100644 drivers/irqchip/irq-riscv-imsic-platform.c create mode 100644 drivers/irqchip/irq-riscv-imsic-state.c create mode 100644 drivers/irqchip/irq-riscv-imsic-state.h create mode 100644 include/linux/irqchip/riscv-aplic.h create mode 100644 include/linux/irqchip/riscv-imsic.h