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[60.250.192.107]) by smtp.gmail.com with ESMTPSA id o17-20020a63fb11000000b005cd835182c5sm6721605pgh.79.2024.03.12.20.57.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Mar 2024 20:57:26 -0700 (PDT) From: Jacky Huang To: linus.walleij@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, p.zabel@pengutronix.de, j.neuschaefer@gmx.net Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ychuang3@nuvoton.com, schung@nuvoton.com Subject: [PATCH v6 0/3] Add support for nuvoton ma35d1 pin control Date: Wed, 13 Mar 2024 03:57:16 +0000 Message-Id: <20240313035719.768469-1-ychuang570808@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240312_205729_609928_5715E89C X-CRM114-Status: GOOD ( 15.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jacky Huang This patch series adds the pin control and GPIO driver for the nuvoton ma35d1 ARMv8 SoC. It includes DT binding documentation and the ma35d1 pin control driver. This pin control driver has been tested on the ma35d1 som board with Linux 6.8-rc5 . v6: - Remove DTS from this patchset. The DTS will be submitted in another patchset. v5: - Update the pinctrl driver header file pinctrl-ma35.h - Include platform_device.h to fix compile issues. v4: - Update the pinctrl driver Kconfig - Add depends to CONFIG_PINCTRL_MA35D1 to prevent compilation errors. - Update the pinctrl driver - Utilize devm_kcalloc() instead of devm_kzalloc(). - Employ ARRAY_SIZE() instead of sizeof()/sizeof(). v3: - Update DTS and YAML files - Corrected the unit address of nodes gpioa ~ gpion. - Removed the invalid "pin-default" node. - Removed the phandle entry from "nuvoton,pins". - Update pinctrl driver - Fixed the Kconfig by using "depend on" instead of "if". - Removed unused #include of header files. - Utilized immutable irq_chip instead of dynamic irq_chip. - Replaced ma35_dt_free_map() with pinconf_generic_dt_free_map(). - Implemented other minor fixes as suggested by the reviewer. v2: - Update nuvoton,ma35d1-pinctrl.yaml - Update the 'nuvoton,pins' to follow the style of rockchip pinctrl approch. - Use power-source to indicate the pin voltage selection which follow the realtek pinctrl approch. - Instead of integer, use drive-strength-microamp to specify the real driving strength capability of IO pins. - Update ma35d1 pinctrl driver - Add I/O drive strength lookup table for translating device tree setting into control register. - Remove ma35d1-pinfunc.h which is unused after update definition of 'nuvoton,pins'. Jacky Huang (3): dt-bindings: reset: Add syscon to nuvoton ma35d1 system-management node dt-bindings: pinctrl: Document nuvoton ma35d1 pin control pinctrl: nuvoton: Add ma35d1 pinctrl and GPIO driver .../pinctrl/nuvoton,ma35d1-pinctrl.yaml | 163 ++ .../bindings/reset/nuvoton,ma35d1-reset.yaml | 3 +- drivers/pinctrl/nuvoton/Kconfig | 19 + drivers/pinctrl/nuvoton/Makefile | 2 + drivers/pinctrl/nuvoton/pinctrl-ma35.c | 1211 +++++++++++ drivers/pinctrl/nuvoton/pinctrl-ma35.h | 51 + drivers/pinctrl/nuvoton/pinctrl-ma35d1.c | 1797 +++++++++++++++++ 7 files changed, 3245 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/nuvoton,ma35d1-pinctrl.yaml create mode 100644 drivers/pinctrl/nuvoton/pinctrl-ma35.c create mode 100644 drivers/pinctrl/nuvoton/pinctrl-ma35.h create mode 100644 drivers/pinctrl/nuvoton/pinctrl-ma35d1.c