mbox series

[v5,0/5] Add CPSW2G and CPSW9G nodes for J784S4

Message ID 20240314072129.1520475-1-c-vankar@ti.com (mailing list archive)
Headers show
Series Add CPSW2G and CPSW9G nodes for J784S4 | expand

Message

Chintan Vankar March 14, 2024, 7:21 a.m. UTC 
This series adds device-tree nodes for CPSW2G and CPSW9G instance
of the CPSW Ethernet Switch on TI's J784S4 SoC. Additionally,
two device-tree overlays are also added:
1. QSGMII mode with the CPSW9G instance via the ENET EXPANSION 1
   connector.
2. USXGMII mode with MAC Ports 1 and 2 of the CPSW9G instance via
   ENET EXPANSION 1 and 2 connectors, configured in fixed-link
   mode of operation at 5Gbps link speed.

Link to v4:
https://lore.kernel.org/r/20240131101441.1362409-1-c-vankar@ti.com/

Changes from v4 to v5:
1. Removed Patch at:
   https://lore.kernel.org/r/20240131101441.1362409-2-c-vankar@ti.com/
   from this version as it is posted as a separate patch at:
   https://lore.kernel.org/r/20240213080348.248916-1-s-vadapalli@ti.com/
2. Disabled node "main_cpsw1_mdio" in k3-j784s4-main.dtsi and enabled it
   in k3-j784s4-evm.dts.

Chintan Vankar (1):
  arm64: dts: ti: k3-j784s4-evm: Add alias for MCU CPSW2G

Siddharth Vadapalli (4):
  arm64: dts: ti: k3-j784s4-main: Add CPSW2G and CPSW9G nodes
  arm64: dts: ti: k3-j784s4-evm: Enable Main CPSW2G node and add aliases
    for it
  arm64: dts: ti: k3-j784s4: Add overlay to enable QSGMII mode with
    CPSW9G
  arm64: dts: ti: k3-j784s4: Add overlay for dual port USXGMII mode

 arch/arm64/boot/dts/ti/Makefile               |  11 +-
 .../ti/k3-j784s4-evm-quad-port-eth-exp1.dtso  | 147 ++++++++++++++
 .../ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso   |  81 ++++++++
 arch/arm64/boot/dts/ti/k3-j784s4-evm.dts      |  51 +++++
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi    | 187 ++++++++++++++++++
 5 files changed, 476 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-quad-port-eth-exp1.dtso
 create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm-usxgmii-exp1-exp2.dtso