From patchwork Tue Apr 9 17:12:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriel FERNANDEZ X-Patchwork-Id: 13622978 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CD244CD128A for ; Tue, 9 Apr 2024 17:14:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=pnY02+qaXr6kWxl0/V3KgZ8YLVgspEt04h0yHemCXmQ=; b=2CfT3q4qEz4sJz qRh9oMHu1oy4ROtzyXxL/O1ZxfMmGYejwNmW3Q9tfsvE/AfT99JAxLI+gH7lBfuSw48vAwD9YFPas hRiDkr2dq9t0GwvzZX4omUlfR15zScyKfggW74uFXnZ0hvaeqvLCQ7LVVcgZ61KLpmPnEPH5E3Whq Zh4XROCD18xC5vLj9jDW/neejjUB4dcaO69eijSl4PKLuOnOWB2iP63O2iZPw5yvOSIJmQnHedEoD OBx5DgEN5ltmRmCvCBqQhP6UTa6SlABaYvt/pq4hOFkIXsfL4bFKjx3HnsmsB71hgxGyJ5zfH0WEk zwT8smxIP6zNnpCXXbuQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1ruF3B-000000036Nx-3Cqj; Tue, 09 Apr 2024 17:14:25 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1ruF32-000000036FW-0dCD for linux-arm-kernel@lists.infradead.org; Tue, 09 Apr 2024 17:14:18 +0000 Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 439H01kA012542; Tue, 9 Apr 2024 19:13:55 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:content-type; s=selector1; bh=gNMZO/g ZNrwN12lTMDycNW5qDShKc3uIHZDokyLEt2E=; b=8TAVXKzspfVriha6jqmEgq6 n0MBvmnceDINt2HRYxuiqytjVy9nWKn3zUbjaB4o9TKftRdWjjyV9mXvTNcBIVNR AbEkCXuNlnHfpJv3WyHSvCOWVRA79J5qQQSF8v0yoIOpFxyPkYEpX6xBsegTktF5 zCY/UoeIh5fOyo4ArbC0TOC75ZD9p55pabE1q5/yk3pRkikBQ5NcyDuYdv1bSdb6 hB2Ms2HpXjorcFybwVcwXalsiIXJ3I2A64pqQtw+rrCwdwhuKk+2kHt63Q9zelSh pV4xl35N6RseGyC+Srt1PtbDo3wcvrz8ccNEmWNUPKA5hv/zKutNFepejh348+A= = Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3xbhbj27q4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 09 Apr 2024 19:13:55 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 41BCC40046; Tue, 9 Apr 2024 19:13:49 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DA62E226FA9; Tue, 9 Apr 2024 19:12:58 +0200 (CEST) Received: from localhost (10.48.86.110) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Tue, 9 Apr 2024 19:12:58 +0200 From: To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Gabriel Fernandez CC: , , , , Subject: [PATCH v10 0/4] Introduce STM32MP257 clock driver Date: Tue, 9 Apr 2024 19:12:37 +0200 Message-ID: <20240409171241.274600-1-gabriel.fernandez@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.48.86.110] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-04-09_12,2024-04-09_01,2023-05-22_02 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240409_101416_908452_617E064B X-CRM114-Status: GOOD ( 15.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Gabriel Fernandez v10: - patch 'dt-bindings: stm32: update DT bingding for stm32mp25' - cosmetic change (add change blank line) to YAML documentation - rename USB2 into USBH to be compliant with last Reference Manuel - Update commit message cant't add 'Acked-by: Conor Dooley ' because modification above - patch 'clk: stm32: introduce clocks for STM32MP257 platform' - rename USB2 into USBH to be compliant with last Reference Manuel - cosmetic changes to be aligned with open parenthesis. v9: base on next-20240207 - update dt binding documentation with v8 modidification on RCC driver (use .index of clk_parent_data struct to define a parent) - rebase patch "arm64: dts: st: add rcc support for STM32MP25" with next-20240207 tag v8: - use .index of clk_parent_data struct to define a parent - remove unnecessary dependency check with SCMI clock driver - convert to platform device APIs - convert to devm_of_clk_add_hw_provider() - convert single value enum to a define v7: base on next-20231219 - These patches below are applied to clk-next: clk: stm32mp1: move stm32mp1 clock driver into stm32 directory clk: stm32mp1: use stm32mp13 reset driver dt-bindings: stm32: add clocks and reset binding for stm32mp25 - remove unnecessary includes - migrate clock parents to struct clk_parent_data and remove CLK_STM32_XXX() macros to have a more readble code - use platform device APIs (devm_of_iomap() instead of_iomap()) - move content of stm32mp25_rcc_init() to stm32mp25_rcc_clocks_probe() - simply get_clock_deps() - add const to stm32mp25_data struct - remove ck_icn_p_serc clock (will be integrate later with security management) v6: - remove useless defines in drivers/clk/stm32/stm32mp25_rcc.h v5: - Fix sparse warnings: was not declared. Should it be static? drivers/clk/stm32/clk-stm32mp13.c:1516:29: symbol 'stm32mp13_reset_data' drivers/clk/stm32/clk-stm32mp1.c:2148:29: symbol 'stm32mp1_reset_data' drivers/clk/stm32/clk-stm32mp25.c:1003:5: symbol 'stm32mp25_cpt_gate' drivers/clk/stm32/clk-stm32mp25.c:1005:29: symbol 'stm32mp25_clock_data' drivers/clk/stm32/clk-stm32mp25.c:1011:29: symbol 'stm32mp25_reset_data' v4: - use GPL-2.0-only OR BSD-2-Clause for clock and reset binding files - use quotes ' for #clock-cells and #reset-cells in YAML documentation - reset binding start now to 0 instead 1 - improve management of reset lines that are not managed v3: - from Rob Herring change clock item description in YAML documentation v2: - rework reset binding (use ID witch start from 0) - rework reset driver to manage STM32MP13 / STM32MP15 / STM32MP25 - rework YAML documentation Gabriel Fernandez (4): clk: stm32mp13: use platform device APIs dt-bindings: stm32: update DT bingding for stm32mp25 clk: stm32: introduce clocks for STM32MP257 platform arm64: dts: st: add rcc support for STM32MP25 .../bindings/clock/st,stm32mp25-rcc.yaml | 170 +- arch/arm64/boot/dts/st/stm32mp251.dtsi | 144 +- arch/arm64/boot/dts/st/stm32mp255.dtsi | 4 +- drivers/clk/stm32/Kconfig | 7 + drivers/clk/stm32/Makefile | 1 + drivers/clk/stm32/clk-stm32-core.c | 11 +- drivers/clk/stm32/clk-stm32mp13.c | 72 +- drivers/clk/stm32/clk-stm32mp25.c | 1876 +++++++++++++++++ drivers/clk/stm32/reset-stm32.c | 59 +- drivers/clk/stm32/reset-stm32.h | 7 + drivers/clk/stm32/stm32mp25_rcc.h | 712 +++++++ include/dt-bindings/reset/st,stm32mp25-rcc.h | 2 +- 12 files changed, 2923 insertions(+), 142 deletions(-) create mode 100644 drivers/clk/stm32/clk-stm32mp25.c create mode 100644 drivers/clk/stm32/stm32mp25_rcc.h