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[35.204.239.8]) by smtp.gmail.com with ESMTPSA id q25-20020aa7cc19000000b0057203242f31sm6187837edt.11.2024.04.26.06.25.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Apr 2024 06:25:39 -0700 (PDT) From: =?utf-8?q?Andr=C3=A9_Draszik?= Subject: [PATCH v3 0/2] clock support for Samsung Exynos pin controller (Google Tensor gs101) Date: Fri, 26 Apr 2024 14:25:13 +0100 Message-Id: <20240426-samsung-pinctrl-busclock-v3-0-adb8664b8a7e@linaro.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIADmrK2YC/43NQQ6CMBCF4auYrq0ZBqjVlfcwLkopMBFb0kKjI dzdwko3xuX/kvlmZsF4MoGddzPzJlIgZ1Pk+x3TnbKt4VSnZghYQIElD+oRJtvygawefc+rKej e6TvPykxjXh+FFMDS+eBNQ8+Nvt5SdxRG51/bp5it6x9ozDhweZIKAVRlhLz0ZJV3B+dbtqoRP yXxQ8JVqhujlaoaQPiSlmV5Azqb0aULAQAA To: Krzysztof Kozlowski , Sylwester Nawrocki , Alim Akhtar , Linus Walleij , Rob Herring , Conor Dooley , Tomasz Figa , Peter Griffin Cc: Tudor Ambarus , Will McVicker , Sam Protsenko , kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andr=C3=A9_Draszik?= X-Mailer: b4 0.12.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240426_062542_182494_377DD9CB X-CRM114-Status: GOOD ( 12.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series enables clock support on the Samsung Exynos pin controller driver. This is required on Socs like Google Tensor gs101, which implement fine-grained clock control / gating, and as such a running bus clock is required for register access to work. Signed-off-by: André Draszik --- Changes in v3: - fix binding for non-gs101 platforms (Krzysztof), sorry I missed that initially :-( - Link to v2: https://lore.kernel.org/r/20240426-samsung-pinctrl-busclock-v2-0-8dfecaabf020@linaro.org Changes in v2: - propagate clk_enable() errors in samsung_pinmux_setup(), i.e. struct pinmux_ops::set_mux() - move clk_enable()/disable() outside bank->slock lock, to avoid possible deadlocks due to locking inversion (Krzysztof) - fix some comments (Krzysztof) - use 'ret' instead of 'i' in samsung_pinctrl_resume() (Krzysztof) - Link to v1: https://lore.kernel.org/r/20240425-samsung-pinctrl-busclock-v1-0-898a200abe68@linaro.org --- André Draszik (2): dt-bindings: pinctrl: samsung: google,gs101-pinctrl needs a clock pinctrl: samsung: support a bus clock .../bindings/pinctrl/samsung,pinctrl.yaml | 21 ++++ drivers/pinctrl/samsung/pinctrl-exynos.c | 112 +++++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-samsung.c | 95 ++++++++++++++++- drivers/pinctrl/samsung/pinctrl-samsung.h | 2 + 4 files changed, 227 insertions(+), 3 deletions(-) --- base-commit: a59668a9397e7245b26e9be85d23f242ff757ae8 change-id: 20240425-samsung-pinctrl-busclock-151c23d76860 Best regards,