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[0/4] hook up pin controller clocks on Google Tensor gs101

Message ID 20240429-samsung-pinctrl-busclock-dts-v1-0-5e935179f3ca@linaro.org (mailing list archive)
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Series hook up pin controller clocks on Google Tensor gs101 | expand

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André Draszik April 29, 2024, 8:04 p.m. UTC 
This series hooks up the individual clocks for each pin controller in the
gs101 DTS.

On Google Tensor gs101 there are separate bus clocks / gates each for each
pinctrl instance. To be able to access each pinctrl instance's registers,
this bus clock needs to be running, otherwise register access will hang.

The driver update to support this extra clock has been proposed in
https://lore.kernel.org/r/20240426-samsung-pinctrl-busclock-v3-0-adb8664b8a7e@linaro.org

This series depends on:
* hsi2 series:
  https://lore.kernel.org/r/20240429-hsi0-gs101-v3-0-f233be0a2455@linaro.org
* pin controller clock support:
  https://lore.kernel.org/r/20240426-samsung-pinctrl-busclock-v3-0-adb8664b8a7e@linaro.org

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
André Draszik (4):
      arm64: dts: exynos: gs101: specify bus clock for pinctrl (far) alive
      arm64: dts: exynos: gs101: specify bus clock for pinctrl_peric[01]
      arm64: dts: exynos: gs101: specify bus clock for pinctrl_hsi2
      arm64: dts: exynos: gs101: specify placeholder clocks for remaining pinctrl

 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)
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base-commit: 87e0588641086e91f3d0a7d97b939301990b1e86
change-id: 20240429-samsung-pinctrl-busclock-dts-46b223471541

Best regards,