From patchwork Sat Jun 1 12:15:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13682370 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 283A5C27C4F for ; Sat, 1 Jun 2024 12:35:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=1i/XK2RtiQyk3IIRoQAkX21CQDjI/AjewuAcft5eFI0=; b=TDA35ZuKahi9Rn og3LdZKeINOeJ8RUw848XwumR5lXKwBKtc1giw5ma4a2mhsw9z2Ds/8TMiBvLheW7cosWF8Rwzrzj s/hEnOq2npOLPMV0MmNY6IGn2Xx5+n4vj1lFaJVfvTzh30ELC1e/1QLL9rBmnLqVhXJui8l8XAXTn 3u3pMZImCd/VYLoRULCRSdn8o0zZMkjnbmYtcpe97TsGjRWZoh8NjHRqw2nS5rm8rNw4Cb4lLBq3+ xYAzXWwpJ4fPUUDh47r2NZNXJ6sfKqzK2xZiwiovcK37B18w/WLhPfxjDJB0qS0glSm45l45yMELz F1S5QGZJIGNZ+TmUlC6Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDNwn-0000000CavM-2CEf; Sat, 01 Jun 2024 12:34:57 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDNed-0000000CUBE-1muk for linux-arm-kernel@lists.infradead.org; Sat, 01 Jun 2024 12:16:13 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 451CFxpn124500; Sat, 1 Jun 2024 07:15:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1717244160; bh=QufcMYh3YXU2xy/76eZ1TcO5FsqW7dBlYNeGOlQBUwE=; h=From:To:CC:Subject:Date; b=IHL0EHTMIbfMR9NMqj2Ek1+VGiC30zRq0TCJuKrFgDTdCpB4AzakyB53UmR0ta9HX AUINPUy9OihXJ3TMEX89bNzEHzQlVeKSFKiDwB0hAjwx235MNhKc0iaXRBJDaFgfZF KoDH8rSB3iYayOkUv+vs3IgZU2LsZ69OHMddzb/g= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 451CFx9q000651 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 1 Jun 2024 07:15:59 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sat, 1 Jun 2024 07:15:59 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 1 Jun 2024 07:15:59 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.227.9]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 451CFtkE009323; Sat, 1 Jun 2024 07:15:55 -0500 From: Siddharth Vadapalli To: , , , , , , , CC: , , , , , , Subject: [PATCH v4 0/7] Add PCIe, SERDES and USB DT support for J722S Date: Sat, 1 Jun 2024 17:45:47 +0530 Message-ID: <20240601121554.2860403-1-s-vadapalli@ti.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_051611_601334_E765CD7C X-CRM114-Status: GOOD ( 13.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello, This series adds the device-tree support for enabling PCIe and USB functionality on J722S-EVM. Since AM62P and J722S SoCs share most of the peripherals, the files have been renamed to indicate the same. The main domain peripherals on both SoCs that aren't shared are present in the "soc-main.dtsi" files. This change has been made based on Roger's feedback at: https://lore.kernel.org/r/f52d9569-a399-422f-9cf0-b0bf69b64d18@kernel.org/ This series has been tested on J722S-EVM for PCIe and USB functionality: https://gist.github.com/Siddharth-Vadapalli-at-TI/bb20e30a4a9e29e1a6772915c13dd214 Sanity testing on AM62P5-SK with this series: https://gist.github.com/Siddharth-Vadapalli-at-TI/a8764b3180d20d7e380b167637136676 v3: https://lore.kernel.org/r/20240524090514.152727-1-s-vadapalli@ti.com/ Changes since v3: - Rebased series on next-20240531. - Renamed files to indicate that they are shared between AM62P and J722S: k3-am62p.dtsi => k3-am62p-j722s-common.dtsi k3-am62p-main.dtsi => k3-am62p-j722s-common-main.dtsi k3-am62p-mcu.dtsi => k3-am62p-j722s-common-mcu.dtsi k3-am62p-wakeup.dtsi => k3-am62p-j722s-common-wakeup.dtsi - Moved AM62P specific USB1 from the shared k3-am62p-j722s-common-main.dtsi to AM62P specific k3-am62p-main.dtsi - Updated k3-j722s.dtsi to include k3-am62p-j722s-common.dtsi instead of including k3-am62p5.dtsi - Added J722S specific main domain peripherals namely USB1, PCIe and SERDES in k3-j722s-main.dtsi Regards, Siddharth. Siddharth Vadapalli (7): arm64: dts: ti: am62p: Rename am62p-{}.dtsi to am62p-j722s-common-{}.dtsi arm64: dts: ti: k3-am62p-j722s: Move AM62P specific USB1 to am62p-main.dtsi arm64: dts: ti: k3-j722s: Add main domain peripherals specific to J722S arm64: dts: ti: k3-j722s: Switch to k3-am62p-j722s-common.dtsi arm64: dts: ti: k3-serdes: Add SERDES0/SERDES1 lane-muxing macros for J722S arm64: dts: ti: k3-j722s-main: Add SERDES and PCIe support arm64: dts: ti: k3-j722s: Enable PCIe and USB support on J722S-EVM .../dts/ti/k3-am62p-j722s-common-main.dtsi | 1067 +++++++++++++++++ ...cu.dtsi => k3-am62p-j722s-common-mcu.dtsi} | 2 +- ...dtsi => k3-am62p-j722s-common-wakeup.dtsi} | 2 +- ...-am62p.dtsi => k3-am62p-j722s-common.dtsi} | 6 +- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 1060 ---------------- arch/arm64/boot/dts/ti/k3-am62p5.dtsi | 3 +- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 72 ++ arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 170 +++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 97 +- arch/arm64/boot/dts/ti/k3-serdes.h | 8 + 10 files changed, 1420 insertions(+), 1067 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi rename arch/arm64/boot/dts/ti/{k3-am62p-mcu.dtsi => k3-am62p-j722s-common-mcu.dtsi} (98%) rename arch/arm64/boot/dts/ti/{k3-am62p-wakeup.dtsi => k3-am62p-j722s-common-wakeup.dtsi} (97%) rename arch/arm64/boot/dts/ti/{k3-am62p.dtsi => k3-am62p-j722s-common.dtsi} (97%) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi