From patchwork Tue Jun 4 14:30:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 13685401 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 205BFC25B78 for ; Tue, 4 Jun 2024 14:31:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=ZDKrd3KQzqzmfyqVAWr3MH2CWMwlO5albtAfLJH+w6E=; b=aXbsXP6IGhAIIw TEke1K/P3m/y7gzcvHN9ssmwTHrbA1M/mePcwnPMzxk3zCvlB5n604Mz9dMEV/C4oGSkZVzh/1KJ3 H1exZGvATT3A9ux4mpzFzpqJ8CYUj7Zju3pawu1vV2hbWj7gR6LrlTH3C8U7Bvpw2jejtqmDw+K3O BpPMSBBCNJyl+rI+D8+NOXgL3wouzhno32z6uRKQjcJeQjMfSryvU0vMrwjvMsgn0ROXUvYJpHiI+ Hqelp4F0rsZt5fBcAcqgXTmTroRq0/IkshRJQFLVosCCcgEVAFIWtipRJd0yn4XQOSYqY591i4HLL zEraRJAcXmoHTUiLMaWg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sEVC8-00000002hZi-3AIh; Tue, 04 Jun 2024 14:31:24 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sEVC5-00000002hXb-2fhZ for linux-arm-kernel@lists.infradead.org; Tue, 04 Jun 2024 14:31:23 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 905391042; Tue, 4 Jun 2024 07:31:42 -0700 (PDT) Received: from e127643.broadband (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1D1C33F64C; Tue, 4 Jun 2024 07:31:15 -0700 (PDT) From: James Clark To: coresight@lists.linaro.org, suzuki.poulose@arm.com, gankulkarni@os.amperecomputing.com, mike.leach@linaro.org, leo.yan@linux.dev, anshuman.khandual@arm.com Cc: James Clark , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Jiri Olsa , Ian Rogers , Adrian Hunter , John Garry , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-perf-users@vger.kernel.org Subject: [PATCH v2 00/16] coresight: Use per-sink trace ID maps for Perf sessions Date: Tue, 4 Jun 2024 15:30:09 +0100 Message-Id: <20240604143030.519906-1-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240604_073121_874098_6AF0EDB0 X-CRM114-Status: GOOD ( 19.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This will allow sessions with more than CORESIGHT_TRACE_IDS_MAX ETMs as long as there are fewer than that many ETMs connected to each sink. Each sink owns its own trace ID map, and any Perf session connecting to that sink will allocate from it, even if the sink is currently in use by other users. This is similar to the existing behavior where the dynamic trace IDs are constant as long as there is any concurrent Perf session active. It's not completely optimal because slightly more IDs will be used than necessary, but the optimal solution involves tracking the PIDs of each session and allocating ID maps based on the session owner. This is difficult to do with the combination of per-thread and per-cpu modes and some scheduling issues. The complexity of this isn't likely to worth it because even with multiple users they'd just see a difference in the ordering of ID allocations rather than hitting any limits (unless the hardware does have too many ETMs connected to one sink). Per-thread mode works but only until there are any overlapping IDs, at which point Perf will error out. Both per-thread mode and sysfs mode are left to future changes, but both can be added on top of this initial implementation and only sysfs mode requires further driver changes. The HW_ID version field hasn't been bumped in order to not break Perf which already has an error condition for other values of that field. Instead a new minor version has been added which signifies that there are new fields but the old fields are backwards compatible. Changes since V1: * Rename coresight_device.perf_id_map to perf_sink_id_map. * Instead of outputting a HW_ID for each reachable ETM, output the sink ID and continue to output only the HW_ID once for each mapping. * Keep the first two Perf patches so that it applies cleanly on coresight-next, although they have been applied on perf-tools-next * Add new *_map() functions to the trace ID public API instead of modifying existing ones. * Collapse "coresight: Pass trace ID map into source enable" into "coresight: Use per-sink trace ID maps for Perf sessions" because the first commit relied on the default map being accessible which is no longer necessary due to the previous bullet point. James Clark (16): perf cs-etm: Print error for new PERF_RECORD_AUX_OUTPUT_HW_ID versions perf auxtrace: Allow number of queues to be specified perf: cs-etm: Create decoders after both AUX and HW_ID search passes perf: cs-etm: Allocate queues for all CPUs perf: cs-etm: Move traceid_list to each queue perf: cs-etm: Create decoders based on the trace ID mappings perf: cs-etm: Support version 0.1 of HW_ID packets coresight: Remove unused ETM Perf stubs coresight: Clarify comments around the PID of the sink owner coresight: Move struct coresight_trace_id_map to common header coresight: Expose map arguments in trace ID API coresight: Make CPU id map a property of a trace ID map coresight: Use per-sink trace ID maps for Perf sessions coresight: Remove pending trace ID release mechanism coresight: Re-emit trace IDs when the sink changes in per-thread mode coresight: Emit sink ID in the HW_ID packets drivers/hwtracing/coresight/coresight-core.c | 36 +- drivers/hwtracing/coresight/coresight-dummy.c | 3 +- .../hwtracing/coresight/coresight-etm-perf.c | 50 +- .../hwtracing/coresight/coresight-etm-perf.h | 20 +- .../coresight/coresight-etm3x-core.c | 9 +- .../coresight/coresight-etm4x-core.c | 9 +- drivers/hwtracing/coresight/coresight-priv.h | 1 + drivers/hwtracing/coresight/coresight-stm.c | 3 +- drivers/hwtracing/coresight/coresight-sysfs.c | 3 +- .../hwtracing/coresight/coresight-tmc-etr.c | 5 +- drivers/hwtracing/coresight/coresight-tmc.h | 5 +- drivers/hwtracing/coresight/coresight-tpdm.c | 3 +- .../hwtracing/coresight/coresight-trace-id.c | 109 ++-- .../hwtracing/coresight/coresight-trace-id.h | 70 +- include/linux/coresight-pmu.h | 17 +- include/linux/coresight.h | 20 +- tools/include/linux/coresight-pmu.h | 17 +- tools/perf/util/auxtrace.c | 9 +- tools/perf/util/auxtrace.h | 1 + .../perf/util/cs-etm-decoder/cs-etm-decoder.c | 28 +- tools/perf/util/cs-etm.c | 603 ++++++++++++------ tools/perf/util/cs-etm.h | 2 +- 22 files changed, 628 insertions(+), 395 deletions(-) Tested-by: Leo Yan