From patchwork Wed Jun 12 13:24:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siddharth Vadapalli X-Patchwork-Id: 13694995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1251AC27C53 for ; Wed, 12 Jun 2024 13:24:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=2iXm9tvlGvr1d3NMZd2vWKy7oyTx9W7IxuHo+Pco1lk=; b=ElIFn9sfxzlDS6YEsVNtFC37fB mp2QwWtAzeA8row/UWEhz2cNMg16Nr51gsN3o0pseefqzX0KSgJtUNUUnIw25LVQNCeNIyejbnd3s U3ugwXAGDiFNbMSnu/m3QfpBt/P5+N9CFa5TJNjADDVDwLfQwv7hcJACpapRHIV/G21IYwoP2mj0W YecSPqVZZnW6zb01sSyr+nlTkBvW2wuFX2/4Ckmu51rrw5rs3WfeRaNUxAjh2ETjDg3zxvuff3js7 O89MMpHO2wIf4vxDieKKy19Y4WwEVWOMkTOU7K31zy2oulMHR6jiTYCiZ3Y2ViGTE61fTSZRjsOOQ UDJ3i+DQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sHNxf-0000000CitQ-2wxO; Wed, 12 Jun 2024 13:24:23 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sHNxd-0000000Cirn-2BqE for linux-arm-kernel@lists.infradead.org; Wed, 12 Jun 2024 13:24:23 +0000 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 45CDOFUM111030; Wed, 12 Jun 2024 08:24:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1718198655; bh=2iXm9tvlGvr1d3NMZd2vWKy7oyTx9W7IxuHo+Pco1lk=; h=From:To:CC:Subject:Date; b=VAgItWQCi3bPL6BcDAtHedvieSATXh8pv+BRl9sI5pUGyOaWeru7o5p/02IXFczNa O3SQQg3bgyxWP1Bg5yL1GCk3QGW66E6lhUDFq2Yo/WfV9eZ2euSPiYd+t6/FBVj0f7 IVwtVf8qnMtoeyEs7dS5B04CrkhEyyIWeIVVAur0= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 45CDOF96083298 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 12 Jun 2024 08:24:15 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 12 Jun 2024 08:24:15 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 12 Jun 2024 08:24:15 -0500 Received: from uda0492258.dhcp.ti.com (uda0492258.dhcp.ti.com [172.24.227.9]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45CDOAmq046478; Wed, 12 Jun 2024 08:24:11 -0500 From: Siddharth Vadapalli To: , , , , , , , CC: , , , , , , Subject: [PATCH v6 0/8] Add PCIe, SERDES and USB DT support for J722S Date: Wed, 12 Jun 2024 18:54:01 +0530 Message-ID: <20240612132409.2477888-1-s-vadapalli@ti.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240612_062421_674959_AC11E5C4 X-CRM114-Status: GOOD ( 13.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello, This series adds the device-tree support for enabling PCIe and USB functionality on J722S-EVM. Since AM62P and J722S SoCs share most of the peripherals, the files have been renamed to indicate the same. The main domain peripherals on both SoCs that aren't shared are present in the "soc-main.dtsi" files. This change has been made based on Roger's feedback at: https://lore.kernel.org/r/f52d9569-a399-422f-9cf0-b0bf69b64d18@kernel.org/ This series has been tested on J722S-EVM for PCIe and USB functionality: https://gist.github.com/Siddharth-Vadapalli-at-TI/7c9fdfd25fdcd02eaf02a70db8bd46fd Sanity testing on AM62P5-SK with this series: https://gist.github.com/Siddharth-Vadapalli-at-TI/74893311fbebdc523e0ae8e158eee19f v5: https://lore.kernel.org/r/20240604085252.3686037-1-s-vadapalli@ti.com/ Changes since v5: - Rebased series on linux-next tagged next-20240612. - Collected Acked-by/Reviewed-by tags from v4 series. - k3-am62p.dtsi is left as-is, instead of changing it to k3-am62p-j722s-common.dtsi. - Renamed k3-am62p-thermal.dtsi to k3-am62p-j722s-common-thermal.dtsi. - Based on Vignesh's suggestion at: https://lore.kernel.org/r/9e7d3f9b-c762-40cd-9d0d-2f071aa3c371@ti.com/ and at: https://lore.kernel.org/r/79eedaea-bf4f-4a20-8a52-751ce7187523@ti.com/ the following is the file hierarchy in the current series: k3-am62p.dtsi = k3-am62p-j722s-common-{main,mcu,wakeup}.dtsi + k3-am62p-main.dtsi k3-am62p5.dtsi = CPUs + k3-am62p.dtsi k3-j722s.dtsi = CPUs + CBASS-Ranges + k3-am62p-j722s-common-{main,mcu,wakeup}.dtsi + k3-j722s-main.dtsi Regards, Siddharth. Siddharth Vadapalli (8): arm64: dts: ti: am62p: Rename am62p-{}.dtsi to am62p-j722s-common-{}.dtsi arm64: dts: ti: k3-am62p-j722s: Move AM62P specific USB1 to am62p-main.dtsi arm64: dts: ti: k3-j722s: Add main domain peripherals specific to J722S arm64: dts: ti: k3-j722s: Switch to k3-am62p-j722s-common-{}.dtsi includes arm64: dts: ti: k3-j722s: Move MAIN domain overrides to k3-j722s-main.dtsi arm64: dts: ti: k3-serdes: Add SERDES0/SERDES1 lane-muxing macros for J722S arm64: dts: ti: k3-j722s-main: Add SERDES and PCIe support arm64: dts: ti: k3-j722s: Enable PCIe and USB support on J722S-EVM .../dts/ti/k3-am62p-j722s-common-main.dtsi | 1068 +++++++++++++++++ ...cu.dtsi => k3-am62p-j722s-common-mcu.dtsi} | 3 +- ...tsi => k3-am62p-j722s-common-thermal.dtsi} | 0 ...dtsi => k3-am62p-j722s-common-wakeup.dtsi} | 3 +- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 1063 +--------------- arch/arm64/boot/dts/ti/k3-am62p.dtsi | 9 +- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 73 ++ arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 184 +++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 165 ++- arch/arm64/boot/dts/ti/k3-serdes.h | 8 + 10 files changed, 1500 insertions(+), 1076 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi rename arch/arm64/boot/dts/ti/{k3-am62p-mcu.dtsi => k3-am62p-j722s-common-mcu.dtsi} (98%) rename arch/arm64/boot/dts/ti/{k3-am62p-thermal.dtsi => k3-am62p-j722s-common-thermal.dtsi} (100%) rename arch/arm64/boot/dts/ti/{k3-am62p-wakeup.dtsi => k3-am62p-j722s-common-wakeup.dtsi} (97%) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi