From patchwork Wed Jun 19 14:11:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13703881 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 562A8C27C53 for ; Wed, 19 Jun 2024 14:11:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Message-ID:Date:Subject:Cc:To:From:Reply-To: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=hE6ycuyCYcKjNiLKg5Nc8g/Q2hfyOzNxRO52ycFg3Qc=; b=MzUa0rw5XlmmOdlxNT8uGhmgYo VWo9mbq8Pg2Iv6RyG9OIosGXlCb1IvtWmLsrCLhGaV15EQYrq19kiFOIm1MH2UODEemCqeAYtIGCA 36kZ6R47jLFoDypayF8hBg+61UYICujKeiS/uIcPONujJKkB95zuU3H/2JJoidfUbNqmGrsfiY8ro Azsyim+pbEgFvnkYAP55vmpPKBPCPPf3EPPxO9TCMc1ojhXOBSHW6EO3klrrCdHzVJI6SvfDxYHhR DwirCWrNa+tC9iCO20bdaCqUirC1g/xQ5NZIeAG/mN18byY/KVHocXcS2P5kwo2oVBckvZtuItA7S 6QXVPT0A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJw2K-00000001SMd-2ZUO; Wed, 19 Jun 2024 14:11:44 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJw2H-00000001SLB-3AtP for linux-arm-kernel@lists.infradead.org; Wed, 19 Jun 2024 14:11:43 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 4E53B61CDF; Wed, 19 Jun 2024 14:11:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E53F1C2BBFC; Wed, 19 Jun 2024 14:11:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1718806300; bh=1YWJeqvdXPFsLbyNh0iIyk0lJIL3xaUZtpAoZ+VLyls=; h=From:To:Cc:Subject:Date:From; b=LY6uVdxMzWy1bC9bkrqmUh2OQBgyINQ5xRo722XaJKoLIiDV5/xbfnZjyV9wotisR zrbv/91d4/5sfaRo+KS4J+CsVJv2HrB9WhxnSwnymMXGbwE0jy+Ruh5MRek4ldZr1W WauLpW79NCc62MNHAezQHJktq4Fuq+uxINgVocB5VHaONGEpNpGCXjQFWFtoCjqMl2 4aMH+bzN7V0LfDGy3geswsv/IVfMpuRaas0kokKtGXgItpYDs5q/VAJO3XJct2tR8n QBDnFAFLBSPXmMZ2poGDwWCSzYpVsPo9DAr/5oQjTmThlJquhZvH4wn/czBWbydINu a9uhNI+PJ7QmA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 0/4] armada-370-xp irqchip updates Date: Wed, 19 Jun 2024 16:11:30 +0200 Message-ID: <20240619141134.30900-1-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240619_071141_878627_95D5CF3D X-CRM114-Status: GOOD ( 10.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Thomas, Andrew, Andy, et al. this is a resurrection of an old series of changes for the armada-370-xp irqchip. I have refactored these changes and updated commit messages. The first three patches are small "cleanups". The 4th is a little larger, it increases the number of available MSI interrupt lines from 16 to 32, on platforms where the MPIC is not used for IPI interrupts. Note that this driver is in need of a major refactor, to bring it to modern standards, but that is unfortunately currently infeasible with my time constraints. Marek Pali Rohár (4): irqchip/armada-370-xp: Do not allow mapping IRQ 0 and 1 irqchip/armada-370-xp: Exit ipi_resume() early if IPI is not used irqchip/armada-370-xp: Do not touch IPI registers on platforms without IPI irqchip/armada-370-xp: Add support for 32 MSI interrupts on non-IPI platforms drivers/irqchip/irq-armada-370-xp.c | 101 +++++++++++++++++++++++----- 1 file changed, 86 insertions(+), 15 deletions(-)