From patchwork Tue Jun 25 13:30:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: James Clark X-Patchwork-Id: 13711144 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64A87C2BBCA for ; Tue, 25 Jun 2024 13:32:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=8hTNEe3suO875LzuA5/ajbpvCcgemH8Q6R00/xtZTCo=; b=d7Bq9mg1vjK9OhHbtir/kFw+hS Qfb6R2+PTPsBwSivrMo9RhqwmRN461wyvkluJealR0yzrlXDl5r8dtD3k6lEWbqKuSP6ab7Fvg/X3 dY8rmCmkHdLeIJBv5A09QaQKk2rkKKNFbkSrKpigd1qHvTHFrC2/ASaj6gCahL77wvnVJuijeh24h w7nKKc3KidTj6xmIgwzso653vWWye/e8J7mePr/7b9ql4ZkknRVcXcgIpxUHIb2iUDyU1/slD2qSs gvAcwM3MmTmv/NXMOhoLb8GP818FKPvm4OBT03E5fZiQ1TPTvCUWLAM/yZduWhH6bZ+T0MHMkFJGZ B0GI5O5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sM6HW-00000002yB3-2ppF; Tue, 25 Jun 2024 13:32:22 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sM6HQ-00000002y9S-1Mg1 for linux-arm-kernel@lists.infradead.org; Tue, 25 Jun 2024 13:32:17 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 23728DA7; Tue, 25 Jun 2024 06:32:36 -0700 (PDT) Received: from e127643.broadband (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id CB16F3F73B; Tue, 25 Jun 2024 06:32:07 -0700 (PDT) From: James Clark To: coresight@lists.linaro.org, suzuki.poulose@arm.com, gankulkarni@os.amperecomputing.com, mike.leach@linaro.org, leo.yan@linux.dev, anshuman.khandual@arm.com, jszu@nvidia.com, bwicaksono@nvidia.com Cc: James Clark , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , John Garry , Will Deacon , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Jiri Olsa , Ian Rogers , Adrian Hunter , "Liang, Kan" , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-perf-users@vger.kernel.org Subject: [PATCH v4 00/17] coresight: Use per-sink trace ID maps for Perf sessions Date: Tue, 25 Jun 2024 14:30:43 +0100 Message-Id: <20240625133105.671245-1-james.clark@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240625_063216_488429_ED7666D5 X-CRM114-Status: GOOD ( 22.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This will allow sessions with more than CORESIGHT_TRACE_IDS_MAX ETMs as long as there are fewer than that many ETMs connected to each sink. Each sink owns its own trace ID map, and any Perf session connecting to that sink will allocate from it, even if the sink is currently in use by other users. This is similar to the existing behavior where the dynamic trace IDs are constant as long as there is any concurrent Perf session active. It's not completely optimal because slightly more IDs will be used than necessary, but the optimal solution involves tracking the PIDs of each session and allocating ID maps based on the session owner. This is difficult to do with the combination of per-thread and per-cpu modes and some scheduling issues. The complexity of this isn't likely to worth it because even with multiple users they'd just see a difference in the ordering of ID allocations rather than hitting any limits (unless the hardware does have too many ETMs connected to one sink). Per-thread mode works but only until there are any overlapping IDs, at which point Perf will error out. Both per-thread mode and sysfs mode are left to future changes, but both can be added on top of this initial implementation and only sysfs mode requires further driver changes. The HW_ID version field hasn't been bumped in order to not break Perf which already has an error condition for other values of that field. Instead a new minor version has been added which signifies that there are new fields but the old fields are backwards compatible. Changes since v3: * Fix issue where trace IDs were overwritten by possibly invalid ones by Perf in unformatted mode. Now the HW_IDs are also used for unformatted mode unless the kernel didn't emit any. * Add a commit to check the OpenCSD version. * Add a commit to not save invalid IDs in the Perf header. * Replace cs_etm_queue's formatted and formatted_set members with a single enum which is easier to use. * Drop CORESIGHT_TRACE_ID_UNUSED_FLAG as it's no longer needed. * Add a commit to print the queue number in the raw dump. * Don't assert on the number of unformatted decoders if decoders == 0. Changes since v2: * Rebase on coresight-next 6.10-rc2 (b9b25c8496). * Fix double free of csdev if device registration fails. * Fix leak of coresight_trace_id_perf_start() if trace ID allocation fails. * Don't resend HW_ID for sink changes in per-thread mode. The existing CPU field on AUX records can be used to track this instead. * Tidy function doc for coresight_trace_id_release_all() * Drop first two commits now that they are in coresight-next * Add a commit to make the trace ID spinlock local to the map Changes since V1: * Rename coresight_device.perf_id_map to perf_sink_id_map. * Instead of outputting a HW_ID for each reachable ETM, output the sink ID and continue to output only the HW_ID once for each mapping. * Keep the first two Perf patches so that it applies cleanly on coresight-next, although they have been applied on perf-tools-next * Add new *_map() functions to the trace ID public API instead of modifying existing ones. * Collapse "coresight: Pass trace ID map into source enable" into "coresight: Use per-sink trace ID maps for Perf sessions" because the first commit relied on the default map being accessible which is no longer necessary due to the previous bullet point. James Clark (17): perf: cs-etm: Create decoders after both AUX and HW_ID search passes perf: cs-etm: Allocate queues for all CPUs perf: cs-etm: Move traceid_list to each queue perf: cs-etm: Create decoders based on the trace ID mappings perf: cs-etm: Only save valid trace IDs into files perf: cs-etm: Support version 0.1 of HW_ID packets perf: cs-etm: Print queue number in raw trace dump perf: cs-etm: Add runtime version check for OpenCSD coresight: Remove unused ETM Perf stubs coresight: Clarify comments around the PID of the sink owner coresight: Move struct coresight_trace_id_map to common header coresight: Expose map arguments in trace ID API coresight: Make CPU id map a property of a trace ID map coresight: Use per-sink trace ID maps for Perf sessions coresight: Remove pending trace ID release mechanism coresight: Emit sink ID in the HW_ID packets coresight: Make trace ID map spinlock local to the map drivers/hwtracing/coresight/coresight-core.c | 37 +- drivers/hwtracing/coresight/coresight-dummy.c | 3 +- .../hwtracing/coresight/coresight-etm-perf.c | 36 +- .../hwtracing/coresight/coresight-etm-perf.h | 18 - .../coresight/coresight-etm3x-core.c | 9 +- .../coresight/coresight-etm4x-core.c | 9 +- drivers/hwtracing/coresight/coresight-priv.h | 1 + drivers/hwtracing/coresight/coresight-stm.c | 3 +- drivers/hwtracing/coresight/coresight-sysfs.c | 3 +- .../hwtracing/coresight/coresight-tmc-etr.c | 5 +- drivers/hwtracing/coresight/coresight-tmc.h | 5 +- drivers/hwtracing/coresight/coresight-tpdm.c | 3 +- .../hwtracing/coresight/coresight-trace-id.c | 133 ++-- .../hwtracing/coresight/coresight-trace-id.h | 70 +- include/linux/coresight-pmu.h | 17 +- include/linux/coresight.h | 21 +- tools/build/feature/test-libopencsd.c | 4 +- tools/include/linux/coresight-pmu.h | 17 +- tools/perf/Makefile.config | 2 +- tools/perf/arch/arm/util/cs-etm.c | 11 +- .../perf/util/cs-etm-decoder/cs-etm-decoder.c | 49 +- .../perf/util/cs-etm-decoder/cs-etm-decoder.h | 3 +- .../util/cs-etm-decoder/cs-etm-min-version.h | 13 + tools/perf/util/cs-etm.c | 625 +++++++++++------- tools/perf/util/cs-etm.h | 12 +- 25 files changed, 636 insertions(+), 473 deletions(-) create mode 100644 tools/perf/util/cs-etm-decoder/cs-etm-min-version.h