From patchwork Mon Jul 29 14:20:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13745023 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7E751C3DA61 for ; Mon, 29 Jul 2024 14:23:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Message-ID:Date:Subject:Cc:To:From:Reply-To: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=ndNFmqJdeG5qadwt+oFSY9r+LyfIOKetH7HTQgDg39o=; b=k9tJUUm67e69fYRtNx9uKnjdaZ E+REOdQAcmxKoWvw4FzcCCkOI1pgw05488WmZTgW3Sr3sXkmLM4B+iqI2lK3Nkrw2vFvcRB1FK96t hsk6HVMOnoCFo9cwAUY+dLxLPnu7dYc0Rv2YIDmy1Wu8hZ8yfegWp7OH7zZUCrXCm4reAmSfGOZ/q fTDkXutHtIgd2U4muSBB0BC5sibWc16RpxctoiZnRinau5epJdBXaz8OBOr2yWLvQ57QBC3qkbCOU unlCRixcsayu4ZttqgvwLxc6AJM/EiQWny6AaLCTrwN51I+BIDMrTwbErkhBaBhERhetB7W64s4W1 F/KtKdpA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYRHK-0000000BYYK-30sA; Mon, 29 Jul 2024 14:23:10 +0000 Received: from relay1-d.mail.gandi.net ([217.70.183.193]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYRFY-0000000BXdJ-3gIg for linux-arm-kernel@lists.infradead.org; Mon, 29 Jul 2024 14:21:24 +0000 Received: by mail.gandi.net (Postfix) with ESMTPA id 75A6424000C; Mon, 29 Jul 2024 14:21:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1722262873; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ndNFmqJdeG5qadwt+oFSY9r+LyfIOKetH7HTQgDg39o=; b=WPwsqeJNv8uiFCxHxqj9kJolmkN/5fbmLfzzv/rzkIjg0sRbUsvoLxcT+d4YobfQTYq1xz 4/V9XQok1JL8iOGmklH7X92DvgLUE70/hy687tQNIUbFnlRoUZPlAA4lHPy7ZwTpSemm7h eG19x6P+thKK1fJ7I0E+Gsfdw657Fpk8lgewYrkdFocZyu4m6V9UQBs8C+OWwCnz7nYPsc y0ZU5SffDGrXuAWShHgJpKVdm2V6cgEy+H1t6u8l6vjqjmaXaMbQVj+EcBwwghfUWz1QZw 8RuYlBixaFEHrm1t1Ajdn8nBqp6fZ93ypMf7PBJwQvIIDbIsx1w5CYTdJfKuTw== From: Herve Codina To: Herve Codina , Christophe Leroy , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Qiang Zhao , Li Yang , Mark Brown Cc: linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Petazzoni Subject: [PATCH v1 00/36] soc: fsl: Add support for QUICC Engine TSA and QMC Date: Mon, 29 Jul 2024 16:20:29 +0200 Message-ID: <20240729142107.104574-1-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240729_072121_612583_F56B6603 X-CRM114-Status: GOOD ( 13.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, This series add support for the QUICC Engine (QE) version of TSA and QMC components. CPM1 version is already supported and, as the QE version of those component are pretty similar to the CPM1 version, the series extend the already existing drivers to support for the QE version. The TSA and QMC components are tightly coupled and so the series provides modifications on both components. Of course, this series can be split if it is needed. Let me know. The series is composed of: - Patches 1 and 2: Fixes related to TRNSYNC in the QMC driver - Patches 3..6: Fixes of checkpatch detected issues in the TSA driver - Patch 7: The QE TSA device-tree binding - Patches 8..13: TSA driver preparations for adding support for QE - Patches 14 and 15: The support for QE in TSA + MAINTAINERS update - Patch 16: A TSA API improvement needed for the QE QMC driver - Patch 17: A clarification in the QE QMC driver - Patches 18..22: Fixes of checkpatch detected issues in the QMC driver - Patch 23: The QE QMC device-tree binding - Patches 24..31: QMC driver preparations for adding support for QE - Patches 32 and 33: Missing features additions in QE code - Patches 34..36: The QMC support for QE in QMC + MAINTAINERS update Best regards, Hervé Herve Codina (36): soc: fsl: cpm1: qmc: Update TRNSYNC only in transparent mode soc: fsl: cpm1: qmc: Enable TRNSYNC only when needed soc: fsl: cpm1: tsa: Fix tsa_write8() soc: fsl: cpm1: tsa: Use BIT(), GENMASK() and FIELD_PREP() macros soc: fsl: cpm1: tsa: Fix blank line and spaces soc: fsl: cpm1: tsa: Add missing spinlock comment dt-bindings: soc: fsl: cpm_qe: Add QUICC Engine (QE) TSA controller soc: fsl: cpm1: tsa: Remove unused registers offset definition soc: fsl: cpm1: tsa: Use ARRAY_SIZE() instead of hardcoded integer values soc: fsl: cpm1: tsa: Make SIRAM entries specific to CPM1 soc: fsl: cpm1: tsa: Introduce tsa_setup() and its CPM1 compatible version soc: fsl: cpm1: tsa: Isolate specific CPM1 part from tsa_serial_{dis}connect() soc: fsl: cpm1: tsa: Introduce tsa_version soc: fsl: cpm1: tsa: Add support for QUICC Engine (QE) implementation MAINTAINERS: Add QE files related to the Freescale TSA controller soc: fsl: cpm1: tsa: Introduce tsa_serial_get_num() soc: fsl: cpm1: qmc: Rename QMC_TSA_MASK soc: fsl: cpm1: qmc: Use BIT(), GENMASK() and FIELD_PREP() macros soc: fsl: cpm1: qmc: Fix blank line and spaces soc: fsl: cpm1: qmc: Remove unneeded parenthesis soc: fsl: cpm1: qmc: Fix 'transmiter' typo soc: fsl: cpm1: qmc: Add missing spinlock comment dt-bindings: soc: fsl: cpm_qe: Add QUICC Engine (QE) QMC controller soc: fsl: cpm1: qmc: Introduce qmc_data structure soc: fsl: cpm1: qmc: Re-order probe() operations soc: fsl: cpm1: qmc: Introduce qmc_init_resource() and its CPM1 version soc: fsl: cpm1: qmc: Introduce qmc_{init,exit}_xcc() and their CPM1 version soc: fsl: cpm1: qmc: Rename qmc_chan_command() soc: fsl: cpm1: qmc: Handle RPACK initialization soc: fsl: cpm1: qmc: Rename SCC_GSMRL_MODE_QMC soc: fsl: cpm1: qmc: Introduce qmc_version soc: fsl: qe: Add resource-managed muram allocators soc: fsl: qe: Add missing PUSHSCHED command soc: fsl: cpm1: qmc: Add support for QUICC Engine (QE) implementation soc: fsl: cpm1: qmc: Handle QUICC Engine (QE) soft-qmc firmware MAINTAINERS: Add QE files related to the Freescale QMC controller .../bindings/soc/fsl/cpm_qe/fsl,qe-tsa.yaml | 212 ++++++ .../soc/fsl/cpm_qe/fsl,qe-ucc-qmc.yaml | 197 ++++++ MAINTAINERS | 3 + drivers/soc/fsl/qe/Kconfig | 18 +- drivers/soc/fsl/qe/qe_common.c | 79 +++ drivers/soc/fsl/qe/qmc.c | 667 +++++++++++++----- drivers/soc/fsl/qe/tsa.c | 659 ++++++++++++----- drivers/soc/fsl/qe/tsa.h | 3 + include/dt-bindings/soc/qe-fsl,tsa.h | 13 + include/soc/fsl/qe/qe.h | 23 +- 10 files changed, 1550 insertions(+), 324 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-tsa.yaml create mode 100644 Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,qe-ucc-qmc.yaml create mode 100644 include/dt-bindings/soc/qe-fsl,tsa.h