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AJvYcCWSiPMlzHIFhHbENG0eIY7SE7qO1511VNid8PnFjKljDqjM6cPuGk3QkTlqK4TB8nKYqHBuOIeWIBbwpJ35JDm7F+w3nvuWQtwmotxkGtTQq70Iolw= X-Gm-Message-State: AOJu0YyO7ijxnkJQLGMsafPZvCbQT66SHqbYlFugukNr+qEfU3q4FqKm AqBkWdMFV5335qnylZhg71zBZQprmrXv7/lSlWECY8Qk8K84qyzIkcLu/GkMDHA5C+gxHaxzLbs = X-Google-Smtp-Source: AGHT+IFC2gv72MD76iLYrIda5Eq5rF0jA/Iac8CNQ+Wji3s0CVR3dGMwhSKkd4f/9qM7nWs4EH2/vQ== X-Received: by 2002:a05:6830:1688:b0:709:339e:520a with SMTP id 46e09a7af769-70940c947b4mr13919521a34.28.1722397464132; Tue, 30 Jul 2024 20:44:24 -0700 (PDT) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:1cfb:e012:babc:3f68]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70ead81230bsm9093008b3a.120.2024.07.30.20.44.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jul 2024 20:44:23 -0700 (PDT) From: Chen-Yu Tsai To: Matthias Brugger , AngeloGioacchino Del Regno Cc: Chen-Yu Tsai , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?N=C3=ADcolas_F_=2E_R_=2E_A_=2E_Prad?= =?utf-8?q?o?= Subject: [PATCH 0/3] arm64: dts: mediatek: mt8195: Fix and clean up xhci1 Date: Wed, 31 Jul 2024 11:44:07 +0800 Message-ID: <20240731034411.371178-1-wenst@chromium.org> X-Mailer: git-send-email 2.46.0.rc1.232.g9752f9e123-goog MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240730_204426_134121_7F36FE62 X-CRM114-Status: GOOD ( 14.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi everyone, This series fixes and cleans up the representation of xhci1, whether used in USB 2.0 only or USB 2.0 + 3.0 designs. This work is a result of discussions from the original Kernel CI report [1] on xhci1 failing to probe, and subsequent patches [2][3]. Patch 1 explicitly disables USB 3.0 on the Cherry design. The super speed pairs are used for PCIe instead. Patch 2 does the same for the Radxa Nio 12L. Patch 3 rearranges the PHY assignment such that the default links both USB 2.0 and USB 3.0 PHYs to the controller, and designs using only USB 2.0 will override the PHY assignment and disable USB 3.0 together. The first two patches are fixes and marked for stable. The third is more of a cosmetic change. Please have a look and merge. Thanks ChenYu [1] https://lore.kernel.org/all/9fce9838-ef87-4d1b-b3df-63e1ddb0ec51@notapiano/ [2] https://lore.kernel.org/linux-mediatek/20240711093230.118534-1-angelogioacchino.delregno@collabora.com/ [3] https://lore.kernel.org/linux-mediatek/20240722-usb-1129-probe-pci-clk-fix-v1-1-99ea804228b6@collabora.com/ Chen-Yu Tsai (3): arm64: dts: mediatek: mt8195-cherry: Mark USB 3.0 on xhci1 as disabled arm64: dts: mediatek: mt8395-nio-12l: Mark USB 3.0 on xhci1 as disabled arm64: dts: mediatek: mt8195: Assign USB 3.0 PHY to xhci1 by default arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 2 ++ arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 +- arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts | 2 -- arch/arm64/boot/dts/mediatek/mt8395-kontron-3-5-sbc-i1200.dts | 1 + arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts | 2 ++ 5 files changed, 6 insertions(+), 3 deletions(-)