mbox series

[BOOT-WRAPPER,v3,00/10] Cleanup initialization

Message ID 20240822101441.251184-1-mark.rutland@arm.com (mailing list archive)
Headers show
Series Cleanup initialization | expand

Message

Mark Rutland Aug. 22, 2024, 10:14 a.m. UTC 
These patches cleanup the boot-wrapper initialization logic to make it
more consistent and easier to extend in C code in future. The big
changes are:

* The kernel is always entered via an exception return. This allows us
  to initialize PSTATE consistently, and will allow us to adjust the
  SPSR dynamically in C code in future if necessary.

* Regardless of the entered exception level, CPU state is initialized
  under cpu_init_arch(), allowing for logic to be shared regardless of
  which exception level was entered.

* CPUs are initialized sequentially, which allows better for better
  logging within the boot-wrapper.

Since v1 [1]:
* Retain SPSR.T bit handling; necessary for PSCI
* Comment on handling of CNTFRQ_EL0 when not entered at the highest EL
* Fix missing braces in cpu_init_psci_arch()
* Add Marc's Acked-by tag series-wide

Since v2 [2]:A
* Cleanup commit messages and comments
* Cleanup AArch32 exception return
* Remove per-cpu "Done" message
* Add Andre's Reviewed-by tags

[1] https://lore.kernel.org/linux-arm-kernel/20240729161501.1806271-1-mark.rutland@arm.com/
[2] https://lore.kernel.org/linux-arm-kernel/20240812101555.3558589-1-mark.rutland@arm.com/

Mark.

Mark Rutland (10):
  aarch64: Remove redundant EL1 entry logic
  aarch64: Implement cpu_init_arch()
  aarch64: Always enter kernel via exception return
  aarch32: Refactor inital entry
  aarch32: Implement cpu_init_arch()
  aarch32: Always enter kernel via exception return
  Unify assembly setup paths
  Simplify spin logic
  Add printing functions
  Boot CPUs sequentially

 arch/aarch32/boot.S                          | 95 +++++++++++---------
 arch/aarch32/include/asm/{gic-v3.h => gic.h} |  2 +-
 arch/aarch32/init.c                          | 30 +++++--
 arch/aarch64/boot.S                          | 64 ++++---------
 arch/aarch64/include/asm/{gic-v3.h => gic.h} |  2 +-
 arch/aarch64/init.c                          | 30 +++++--
 arch/aarch64/spin.S                          | 19 +---
 common/boot.c                                | 20 ++---
 common/gic-v3.c                              |  2 +-
 common/gic.c                                 |  2 +-
 common/init.c                                | 48 ++++++++--
 common/platform.c                            | 35 ++++++++
 common/psci.c                                | 16 +---
 include/boot.h                               |  8 +-
 include/gic.h                                | 16 ++++
 include/platform.h                           |  4 +
 16 files changed, 222 insertions(+), 171 deletions(-)
 rename arch/aarch32/include/asm/{gic-v3.h => gic.h} (91%)
 rename arch/aarch64/include/asm/{gic-v3.h => gic.h} (92%)
 create mode 100644 include/gic.h

Comments

Mark Rutland Aug. 27, 2024, 11:10 a.m. UTC | #1 
On Thu, Aug 22, 2024 at 11:14:31AM +0100, Mark Rutland wrote:
> These patches cleanup the boot-wrapper initialization logic to make it
> more consistent and easier to extend in C code in future. The big
> changes are:
> 
> * The kernel is always entered via an exception return. This allows us
>   to initialize PSTATE consistently, and will allow us to adjust the
>   SPSR dynamically in C code in future if necessary.
> 
> * Regardless of the entered exception level, CPU state is initialized
>   under cpu_init_arch(), allowing for logic to be shared regardless of
>   which exception level was entered.
> 
> * CPUs are initialized sequentially, which allows better for better
>   logging within the boot-wrapper.

Applied.

Mark.