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Wysocki" Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Andrei Stefanescu Subject: [PATCH v3 0/4] gpio: siul2-s32g2: add initial GPIO driver Date: Thu, 19 Sep 2024 16:47:20 +0300 Message-ID: <20240919134732.2626144-1-andrei.stefanescu@oss.nxp.com> X-Mailer: git-send-email 2.45.2 X-ClientProxiedBy: AM0PR10CA0109.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::26) To AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB8487:EE_|GVXPR04MB10828:EE_ X-MS-Office365-Filtering-Correlation-Id: 2a107bdd-7547-475b-3de3-08dcd8b1c83f X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|52116014|7416014|376014|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?q?ylKQb1B32LmCsx1LcH0QhK8g5SKdbhj?= =?utf-8?q?mMgZ6ZicDYmRe+0/Ml1u031x59sdztpdIHUqPNImVtmUSSE9KixhJuqRwRtAenaeX?= =?utf-8?q?ozbZCUM3AQHxOJMT6ZiUuwhe3GxQPAnbZVsGmKUtdbVkEeR1qJQ+NtWU11zNxfo+w?= =?utf-8?q?dbAMXFBt0sc77EVh4YG5CD7iNAZL1JHG/EiOGJOQojpUiPVuuKWmio7WJecOpLIOA?= =?utf-8?q?HD2sqAhrkIHudljRPfmAurNXlZfV0f97JOIFoJTvqsIsFDWEVZ8fZGdMfz7jZ8T5N?= =?utf-8?q?e0tU/XNBkJnEHQEtHLln5428vOfjahEZ8647EQVijGMYwAPaPBPCZIpP87f3hRbs4?= =?utf-8?q?nf4B1wu8uWZEAWb/OFIc6RWAKP/9Ti6eLJdiOFQTf/5+hbvo67ebL5yLBFmrdIs3e?= =?utf-8?q?sFhmlnzfOToTGUkDIu+5H764R2KMe7XdkIjDXnhkppnpNlRWeat4xXE9WK2D0PTCK?= =?utf-8?q?rl8FZ73seWv/6mNBeVKBAuoQMZKtYYL0ONiExucorx/UBF0NhVvgM+bpnffBxrerM?= =?utf-8?q?vEIZ+D2fFTEzV2F4JUjHuyYWpqiU/vCWPxqWI6ioWUl7HmZAmOIMkU+CHv5JJu9nq?= =?utf-8?q?Tsnjkcn87N7oFuXifAff4cYQS1G2tzpdWq8kiM2x4ZPeHuDuGCsCMPreUP4I7gOqd?= =?utf-8?q?qSMEsR1eieJLSD6aKwixtE2uo9BtbV2MGRgELYzMwOOphBICi/aT8HcKls/HU6zPN?= =?utf-8?q?qVCCILttmP8iPdVEc9VQQ9l+aJ2IN6Njhh9n6SkJoX3Y3HJ1TsnuPXxCDdmteR/TJ?= =?utf-8?q?3ue1pPBbfceqk1DpPgFw5Lx9RFXIKuk+OhODSUypmBmznJR43Fi4bHwnoMGIIpFUg?= =?utf-8?q?iXH/FdohyvTBsKHvZINqqAgZooJPdJqapXch1+6Hz7RLpdjw1xtOqWeax4M0AxfqU?= =?utf-8?q?rK9taYA40TEZCTaJhp1kZao9MU/+Cg0UcuWkLIo48LU5jlyWOfMazbMlakhyPnXIC?= =?utf-8?q?t++5gO4Y+Qu3ekUoYb/9eHk0JKIsCsi6KDbzYRxvcpLC0weT1r5WqCq92NpYpmfSf?= =?utf-8?q?rt2VEiejdy14l9h4p8Jj6hkpFTdsHnsRBrVPdu+2M0CX4vdMeU/0Ef1R33kv02P0h?= =?utf-8?q?SN8TBxUfkTlWrDtZCZ0MJHJHyOb5CyOzyEuIaRu2xDL9JnBBw6ac7Ib6XIeH6rJTI?= =?utf-8?q?HlnvL9pELtnmLt2PrgG9NWs34/UsF6k6G3B85csVb9I8kdtCo4zbkFgIWsvM5PAgZ?= =?utf-8?q?vUbMf+qBafvdzghUSdnN/USYRjorgIZAap9NLT/Nt5EiM0jGEdEv8CYYcm4blsSma?= =?utf-8?q?4bQ2WRk6lLH3+Zw8SWYwYAylnblhHpUzcj1PwDQrq5G93Ux1kkqbA9I1lrYQfWHTg?= =?utf-8?q?z2eK4kuHQSmp8bNhUtyBALVskwXEj65jcA=3D=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR04MB8487.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(1800799024)(52116014)(7416014)(376014)(38350700014);DIR:OUT;SFP:1101; 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There are two SIUL2 hardware modules: SIUL2_0 and SIUL2_1. However, this driver exports both as a single GPIO driver. This is because the interrupt registers are located only in SIUL2_1, even for GPIOs that are part of SIUL2_0. There are two gaps in the GPIO ranges: - 102-111(inclusive) are invalid - 123-143(inclusive) are invalid These will be excluded via the `gpio-reserved-ranges` property. Writing and reading GPIO values is done via the PGPDO/PGPDI registers(Parallel GPIO Pad Data Output/Input) which are 16 bit registers, each bit corresponding to a GPIO. Note that the PGPDO order is similar to a big-endian grouping of two registers: PGPDO1, PGPDO0, PGPDO3, PGPDO2, PGPDO5, PGPDO4, gap, PGPDO6. I have other patches for this driver: - interrupt support - power management callbacks which I plan to upstream after this series gets merged in order to simplify the review process. v3 -> v2 - fix dt-bindings schema id - add maxItems to gpio-ranges - removed gpio label from dt-bindings example - added changelog for the MAINTAINERS commit and added separate entry for the SIUL2 GPIO driver - added guard(raw_spinlock_irqsave) in 'siul2_gpio_set_direction' - updated the description for 'devm_platform_get_and_ioremap_resource_byname' v2 -> v1 dt-bindings: - changed filename to match compatible - fixed commit messages - removed dt-bindings unnecessary properties descriptions - added minItems for the interrupts property driver: - added depends on ARCH_S32 || COMPILE_TEST to Kconfig - added select REGMAP_MMIO to Kconfig - remove unnecessary include - add of_node_put after `siul2_get_gpio_pinspec` - removed inline from function definitions - removed match data and moved the previous platdata definition to the top of the file to be visible - replace bitmap_set/clear with __clear_bit/set_bit and devm_bitmap_zalloc with devm_kzalloc - switched to gpiochip_generic_request/free/config - fixed dev_err format for size_t reported by kernel test robot - add platform_get_and_ioremap_resource_byname wrapper Andrei Stefanescu (4): drivers: provide devm_platform_get_and_ioremap_resource_byname() dt-bindings: gpio: add support for NXP S32G2/S32G3 SoCs gpio: siul2-s32g2: add NXP S32G2/S32G3 SoCs support MAINTAINERS: add MAINTAINER for S32G2 SIUL2 GPIO driver .../bindings/gpio/nxp,s32g2-siul2-gpio.yaml | 107 ++++ MAINTAINERS | 7 + drivers/base/platform.c | 27 + drivers/gpio/Kconfig | 10 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-siul2-s32g2.c | 576 ++++++++++++++++++ include/linux/platform_device.h | 13 + 7 files changed, 741 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml create mode 100644 drivers/gpio/gpio-siul2-s32g2.c