From patchwork Thu Sep 26 18:09:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13813574 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E3F73CDE029 for ; Thu, 26 Sep 2024 18:10:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=CsVPXYKrkdpFFA8bj1gjkMTFFkhyOuco1Zs7NUqsw6Y=; b=vok0zGnOiWx+CDsRSUzFh4rO8L SxGW4fk20fQHOelxIyRKmcWwG0zAXWY/gPrx/Am/+lhQ3ZS+O4SE463eWQ25xVHrCPKdyg5iZe1qI 8xUHjwxNNNnDqseqLpUlIW/8DWjc8UIoDiE+iA/HyATh5CTwlI0vQYWMNX4q9IOXhi4ip83DtJJ+v Om1PSJBrT7JnA4HBFRTLbM/r3L0TSLaQE3buKtP/1rx144ugpnw0Iz537MyUrJX2WFJZzkPcAxBep 2iwpp9FiGq30OHO2Pd9eEQwhsxcz3+1qOIf+Zfn/Tq2uxTiO+8Wrt6Q4u6OEBS8I4gwmYOmoyAXjO OnumPKpQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1stswt-000000095gp-0HKP; Thu, 26 Sep 2024 18:10:43 +0000 Received: from out-180.mta1.migadu.com ([2001:41d0:203:375::b4]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1stsvf-000000095Q2-1XoW for linux-arm-kernel@lists.infradead.org; Thu, 26 Sep 2024 18:09:30 +0000 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1727374158; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=CsVPXYKrkdpFFA8bj1gjkMTFFkhyOuco1Zs7NUqsw6Y=; b=S+aFpSA/V6FYFj9SsHrGdmlb5qrqPwLo9FQ6cLn/yNMHUSfYElyzFODjQztv/vyqpye/Ts WhO+Td6QH9yHb5HAfF5V/GlCTfi0X/UvH83cLXzC9yhkTs1spjByMR1IbLoZN07vfg+zw/ 1AyuHyVvfeEcbbIwldGffwHXC1gMqik= From: Sean Anderson To: Arnd Bergmann , Olof Johansson , linux-arm-kernel@lists.infradead.org Cc: Krzysztof Kozlowski , Rob Herring , linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Conor Dooley , Magnus Damm , Geert Uytterhoeven , Sean Anderson Subject: [PATCH 0/2] arm64: dts: renesas: Add SD/OE pin properties Date: Thu, 26 Sep 2024 14:09:01 -0400 Message-Id: <20240926180903.479895-1-sean.anderson@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240926_110928_066741_FCFC72A3 X-CRM114-Status: UNSURE ( 9.39 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Linux can configure almost every part of this clock generator without relying on the OTP settings. However, the correct configuration for the SD/OE pin cannot be determined automatically. Therefore, add the appropriate properties to configure this pin. I have CC'd some people who appear to have access to the following boards which use the versaclock5: - Salvator-X - HiHope RZ/G2[MN] Main Board - Beacon Embedded Works RZ/G2N Development Kit as I could not find schematics for these boards. You can help me out by (pick one): - Run the following command and send me the output: $ grep 10: /sys/kernel/debug/regmap/*-006a/registers - Measure the voltage on the SD/OE pin on a functioning board. - Inspect (or send me) the schematic to determine the state of the SD/OE pin during normal operation. My suspicion is that all of these boards use the same configuration (SD/OE pin tied high) owing to their common design heritage. Thanks in advance. Sean Anderson (2): arm64: dts: renesas: salvator-xs: Add SD/OE pin properties arm64: dts: renesas: ulcb: Add SD/OE pin properties arch/arm64/boot/dts/renesas/salvator-xs.dtsi | 2 ++ arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 ++ 2 files changed, 4 insertions(+)