mbox series

[v4,0/2] cppc_cpufreq: Rework ->get() error handling when cores are idle

Message ID 20240929033214.1039485-1-zhanjie9@hisilicon.com (mailing list archive)
Headers show
Series cppc_cpufreq: Rework ->get() error handling when cores are idle | expand

Message

Jie Zhan Sept. 29, 2024, 3:32 a.m. UTC
CPPC feedback counters can be unchanged or 0 when cores are idle, e.g.
clock-gated or power-gated.  In such case, get the latest desired perf for
calculating frequency.

Also, the HiSilicon CPPC workaround can now be removed as it can be handled
by the common code.

---
v4:
- Some additional comments as suggested. No functions changes.

v3:
- Merge patch 1 & 2, tidy up the logic, and reduce duplicate code
- Return 0 in cppc_perf_from_fbctrs() if the feedback counters are
  unchanged rather than return a cached desired perf
- Return early in cppc_scale_freq_workfn() if the feedback counters are
  unchanged

v2:
- Try reading the lastest desired perf first before using the cached one
- Do the same handling logic when feedback counters are unchanged
- Remove hisilicon workaround

Discussions:
v1: https://lore.kernel.org/all/20240819035147.2239767-1-zhanjie9@hisilicon.com/
v2: https://lore.kernel.org/all/20240912072231.439332-1-zhanjie9@hisilicon.com/
v3: https://lore.kernel.org/all/20240919084552.3591400-1-zhanjie9@hisilicon.com/

Jie Zhan (2):
  cppc_cpufreq: Use desired perf if feedback ctrs are 0 or unchanged
  cppc_cpufreq: Remove HiSilicon CPPC workaround

 drivers/cpufreq/cppc_cpufreq.c | 128 ++++++++++++---------------------
 1 file changed, 46 insertions(+), 82 deletions(-)

Comments

Viresh Kumar Oct. 3, 2024, 5:40 a.m. UTC | #1
On 29-09-24, 11:32, Jie Zhan wrote:
> CPPC feedback counters can be unchanged or 0 when cores are idle, e.g.
> clock-gated or power-gated.  In such case, get the latest desired perf for
> calculating frequency.
> 
> Also, the HiSilicon CPPC workaround can now be removed as it can be handled
> by the common code.
> 
> ---
> v4:
> - Some additional comments as suggested. No functions changes.

Merged with following diff to fix the warning.

diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
index ae3424cb3335..fd3e328a2d57 100644
--- a/drivers/cpufreq/cppc_cpufreq.c
+++ b/drivers/cpufreq/cppc_cpufreq.c
@@ -38,13 +38,13 @@ static bool boost_supported;

 static struct cpufreq_driver cppc_cpufreq_driver;

+#ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE
 static enum {
        FIE_UNSET = -1,
        FIE_ENABLED,
        FIE_DISABLED
 } fie_disabled = FIE_UNSET;

-#ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE
 module_param(fie_disabled, int, 0444);
 MODULE_PARM_DESC(fie_disabled, "Disable Frequency Invariance Engine (FIE)");
Jie Zhan Oct. 8, 2024, 1:52 a.m. UTC | #2
On 03/10/2024 13:40, Viresh Kumar wrote:
> On 29-09-24, 11:32, Jie Zhan wrote:
>> CPPC feedback counters can be unchanged or 0 when cores are idle, e.g.
>> clock-gated or power-gated.  In such case, get the latest desired perf for
>> calculating frequency.
>>
>> Also, the HiSilicon CPPC workaround can now be removed as it can be handled
>> by the common code.
>>
>> ---
>> v4:
>> - Some additional comments as suggested. No functions changes.
> 
> Merged with following diff to fix the warning.
> 
> diff --git a/drivers/cpufreq/cppc_cpufreq.c b/drivers/cpufreq/cppc_cpufreq.c
> index ae3424cb3335..fd3e328a2d57 100644
> --- a/drivers/cpufreq/cppc_cpufreq.c
> +++ b/drivers/cpufreq/cppc_cpufreq.c
> @@ -38,13 +38,13 @@ static bool boost_supported;
> 
>  static struct cpufreq_driver cppc_cpufreq_driver;
> 
> +#ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE
>  static enum {
>         FIE_UNSET = -1,
>         FIE_ENABLED,
>         FIE_DISABLED
>  } fie_disabled = FIE_UNSET;
> 
> -#ifdef CONFIG_ACPI_CPPC_CPUFREQ_FIE
>  module_param(fie_disabled, int, 0444);
>  MODULE_PARM_DESC(fie_disabled, "Disable Frequency Invariance Engine (FIE)");
> 

Thanks for fixing the warning and merging!

Jie