From patchwork Tue Oct 1 13:50:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Machon X-Patchwork-Id: 13818033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CB9EECEACC2 for ; Tue, 1 Oct 2024 13:54:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To: Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=vDVdNNdcAhzHLHO2oRCs2nWloO5PuDVEDmTars4cxF8=; b=QU4bimjZbfXlR7 PBn+KoD+FGOD+lSL6EOZPoitqo4FB7F0/xSOs/fdTht3UK6+ol3BdbEjzAEzcLTQjFEmtxYh6JBOw DJNvrxk/aYQKD36dy2fBAP+IcAEYEi2HjQVhsxTYBN8svrj2lZZm9SoKUb7+7+PpbmBIYlIm6KDgo Gomt7GEqAmQZm5Z/mN1rGWNSAZ/IQOKF7n6cNWSIgFWzIBThICUZgFy74TZHUbnWYs1QYo+oG41Jy pSp0JwcZ67Flu9zufLfp9vVbvIWaMjUsusbrOPLjTprYWCt/pq+B4jKCzUbzuI4aD/qfGp/qjzRjf CBn/4MOixE5BQvs6Lbpw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svdKF-000000031ET-1BdM; Tue, 01 Oct 2024 13:54:03 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1svdHi-000000030Ya-2bPq for linux-arm-kernel@lists.infradead.org; Tue, 01 Oct 2024 13:51:28 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1727790686; x=1759326686; h=from:subject:date:message-id:mime-version: content-transfer-encoding:to:cc; bh=3M+QtmIsCGyib62lW2XLY2EtmomiGuLWz3+4DYGzV0E=; b=BCGcDjs9IrnphHVUSr6lJh/uaiNyFHo4d/XQ0kWYhimHiY2gFr2Y4raJ QYXlS+86Yi+qq3Fs3SYqV+wMf4j/7Xtq4Z8fetGKpvE3IPkVt1Z1rf52B bAAlJxJw9wZQlYGdJGzqCZIEhpi1gSpo1fW/hAd/92Gljoeru37Y4u1Kr me0Rz0Ga832HncGpUl6JBPhH+qJZUyW9DzSguYfd4H3s6qJx53Kix43yj OlXr87XEb67N5xSEG6xENPSZDHAAuSHQ6q/PGUIKxLD/absY0Igdx0lIi X08QwJSIcBU91vm97WLRe0k2wwJmlhRDtLUsyIk1YO/riXirtu4A78TQi A==; X-CSE-ConnectionGUID: xZlwFxFMQxGj0XznyNUoig== X-CSE-MsgGUID: 4duBAORFSXWE8c3OiqWikg== X-IronPort-AV: E=Sophos;i="6.11,167,1725346800"; d="scan'208";a="33057479" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 01 Oct 2024 06:51:24 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 1 Oct 2024 06:50:59 -0700 Received: from DEN-DL-M70577.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 1 Oct 2024 06:50:56 -0700 From: Daniel Machon Subject: [PATCH net-next 00/15] net: sparx5: prepare for lan969x switch driver Date: Tue, 1 Oct 2024 15:50:30 +0200 Message-ID: <20241001-b4-sparx5-lan969x-switch-driver-v1-0-8c6896fdce66@microchip.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIACb++2YC/x2N0QrCMAwAf2Xk2UAtm2X+iviQtZkNaBzpmIWxf 7f6eBzc7VDYhAtcux2MNyny1gbnUwcxkz4YJTUG73zvRh9w6rEsZHXAJ+l4GSuWj6wxYzLZ2DD NMQ0+hJmCg1ZZjGep/8MNlFdUrivcm5moME5GGvPv8CJROI4vq2ZDlZIAAAA= To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lars Povlsen , "Steen Hegelund" , , , , Richard Cochran , , , , , CC: , , X-Mailer: b4 0.14-dev X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241001_065126_918362_AE5385B8 X-CRM114-Status: GOOD ( 18.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org == Description: This series is the first of a multi-part series, that prepares and adds support for the new lan969x switch driver. The upstreaming efforts is split into multiple series (might change a bit as we go along): 1) Prepare the Sparx5 driver for lan969x (this series) 2) Add support lan969x (same basic features as Sparx5 provides + RGMII, excl. FDMA and VCAP) 3) Add support for lan969x FDMA 4) Add support for lan969x VCAP == Lan969x in short: The lan969x Ethernet switch family [1] provides a rich set of switching features and port configurations (up to 30 ports) from 10Mbps to 10Gbps, with support for RGMII, SGMII, QSGMII, USGMII, and USXGMII, ideal for industrial & process automation infrastructure applications, transport, grid automation, power substation automation, and ring & intra-ring topologies. The LAN969x family is hardware and software compatible and scalable supporting 46Gbps to 102Gbps switch bandwidths. == Preparing Sparx5 for lan969x: The lan969x switch chip reuses many of the IP's of the Sparx5 switch chip, therefore it has been decided to add support through the existing Sparx5 driver, in order to avoid a bunch of duplicate code. However, in order to reuse the Sparx5 switch driver, we have to introduce some mechanisms to handle the chip differences that are there. These mechanisms are: - Platform match data to contain all the differences that needs to be handled (constants, ops etc.) - Register macro indirection layer so that we can reuse the existing register macros. - Function for branching out on platform type where required. In some places we ops out functions and in other places we branch on the chip type. Exactly when we choose one over the other, is an estimate in each case. After this series is applied, the Sparx5 driver will be prepared for lan969x and still function exactly as before. == Patch breakdown: Patch #1 adds private match data Patch #2 adds register macro indirection layer Patch #3-#5 does some preparation work Patch #6-#8 adds chip constants and updates the code to use them Patch #9-#14 adds and uses ops for handling functions differently on the two platforms. Patch #15 adds and uses a macro for branching out on the chip type [1] https://www.microchip.com/en-us/product/lan9698 To: David S. Miller To: Eric Dumazet To: Jakub Kicinski To: Paolo Abeni To: Lars Povlsen To: Steen Hegelund To: horatiu.vultur@microchip.com To: jensemil.schulzostergaard@microchip.com To: UNGLinuxDriver@microchip.com To: Richard Cochran To: horms@kernel.org To: justinstitt@google.com To: gal@nvidia.com To: aakash.r.menon@gmail.com To: jacob.e.keller@intel.com Cc: netdev@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Daniel Machon Reviewed-by: Jacob Keller --- Daniel Machon (15): net: sparx5: add support for private match data net: sparx5: add indirection layer to register macros net: sparx5: rename *spx5 to *sparx5 in a few places net: sparx5: modify SPX5_PORTS_ALL macro net: sparx5: add *sparx5 argument to a few functions net: sparx5: add constants to match data net: sparx5: use SPX5_CONST for constants which already have a symbol net: sparx5: use SPX5_CONST for constants which do not have a symbol net: sparx5: add ops to match data net: sparx5: ops out chip port to device index/bit functions net: sparx5: ops out functions for getting certain array values net: sparx5: ops out function for setting the port mux net: sparx5: ops out PTP IRQ handler net: sparx5: ops out function for DSM calendar calculation net: sparx5: add is_sparx5 macro and use it throughout drivers/net/ethernet/microchip/sparx5/Makefile | 2 +- .../ethernet/microchip/sparx5/sparx5_calendar.c | 41 +- drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c | 5 +- .../net/ethernet/microchip/sparx5/sparx5_ethtool.c | 33 +- .../net/ethernet/microchip/sparx5/sparx5_fdma.c | 6 +- .../ethernet/microchip/sparx5/sparx5_mactable.c | 6 +- .../net/ethernet/microchip/sparx5/sparx5_main.c | 198 +- .../net/ethernet/microchip/sparx5/sparx5_main.h | 111 +- .../ethernet/microchip/sparx5/sparx5_main_regs.h | 4128 +++++++++++--------- .../net/ethernet/microchip/sparx5/sparx5_netdev.c | 8 +- .../net/ethernet/microchip/sparx5/sparx5_packet.c | 4 +- .../net/ethernet/microchip/sparx5/sparx5_pgid.c | 24 +- .../net/ethernet/microchip/sparx5/sparx5_police.c | 3 +- .../net/ethernet/microchip/sparx5/sparx5_port.c | 71 +- .../net/ethernet/microchip/sparx5/sparx5_port.h | 23 +- .../net/ethernet/microchip/sparx5/sparx5_psfp.c | 45 +- drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c | 6 +- drivers/net/ethernet/microchip/sparx5/sparx5_qos.c | 8 +- drivers/net/ethernet/microchip/sparx5/sparx5_qos.h | 4 +- .../net/ethernet/microchip/sparx5/sparx5_regs.c | 219 ++ .../net/ethernet/microchip/sparx5/sparx5_regs.h | 244 ++ .../net/ethernet/microchip/sparx5/sparx5_sdlb.c | 15 +- .../ethernet/microchip/sparx5/sparx5_switchdev.c | 53 +- drivers/net/ethernet/microchip/sparx5/sparx5_tc.c | 8 +- .../net/ethernet/microchip/sparx5/sparx5_vlan.c | 44 +- 25 files changed, 3191 insertions(+), 2118 deletions(-) --- base-commit: 3a39d672e7f48b8d6b91a09afa4b55352773b4b5 change-id: 20240927-b4-sparx5-lan969x-switch-driver-dfcd5277fa70 Best regards,