From patchwork Tue Oct 1 04:35:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 13817438 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4131ECEB2E3 for ; Tue, 1 Oct 2024 04:39:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=Xv83yvGt2CI0fozcKCKbfMNYfZ0xEx+x14tv9b1WH+I=; b=1wH1ALXU3RGg9C0ayoRMo7Kaex Kko9460UE0+Mdtemn2xSVdGxNIMAP10N/MRCZohdwSgIXKy0WUlysXr4PPZ2aHwg0QXqs4sHbYIXJ vILj2+3tWx4WNt9nQqezbzDFVWU9gF6mjtbb1stOLB/2CWoMw+gv1nWG2dvwnK7ltGqBkgZhZ+Vuw yYuingtjjpGtt9z7ZDIhXG5ixnH4CAHn9XvOpF8FCPccw7AnA7L7hKdbAMJfxIVCzj4edVCOhLv2k y2aa4fLcbP/6DY/V5g9Bo+qL7XKnaq11Fv3/3K1RsCtI8XA7/zBhJJ9296wx0OuEkyIxzk3DuI+RF EVMn/zRA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svUfI-00000001aIY-3Mes; Tue, 01 Oct 2024 04:39:12 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svUcP-00000001Zx7-3gSJ for linux-arm-kernel@lists.infradead.org; Tue, 01 Oct 2024 04:36:16 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9D7EA339; Mon, 30 Sep 2024 21:36:42 -0700 (PDT) Received: from a077893.blr.arm.com (a077893.blr.arm.com [10.162.16.61]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 327773F58B; Mon, 30 Sep 2024 21:36:08 -0700 (PDT) From: Anshuman Khandual To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Jonathan Corbet , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Catalin Marinas , Will Deacon , Mark Brown , Mark Rutland , kvmarm@lists.linux.dev Subject: [PATCH 0/3] arm64/hw_breakpoint: Enable FEAT_Debugv8p9 Date: Tue, 1 Oct 2024 10:05:59 +0530 Message-Id: <20241001043602.1116991-1-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240930_213613_984102_B81E3DC7 X-CRM114-Status: UNSURE ( 8.14 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series enables FEAT_Debugv8p9 thus extending breakpoint and watchpoint support upto 64. This series is based on v6.12-rc1 after applying the KVM FEAT_FGT2 FGU series. https://lore.kernel.org/all/20241001024356.1096072-1-anshuman.khandual@arm.com/ Cc: Jonathan Corbet Cc: Marc Zyngier Cc: Oliver Upton Cc: James Morse Cc: Suzuki K Poulose Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Brown Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.linux.dev Cc: linux-kernel@vger.kernel.org Changes in V1: - Changed FTR_STRICT to FTR_NONSTRICT for the following ID_AA64DFR1_EL1 register fields - ABL_CMPs, DPFZS, PMICNTR, CTX_CMPs, WRPs and BRPs Changes in RFC V2: https://lore.kernel.org/linux-arm-kernel/20240620092607.267132-1-anshuman.khandual@arm.com/ - This series has been split from RFC V1 dealing only with arm64 breakpoints - Restored back DBG_MDSCR_MASK definition (unrelated change) - Added preempt_disable()/enable() blocks between selecting banks and registers Changes in RFC: https://lore.kernel.org/all/20240405080008.1225223-1-anshuman.khandual@arm.com/ Anshuman Khandual (3): arm64/cpufeature: Add field details for ID_AA64DFR1_EL1 register arm64/boot: Enable EL2 requirements for FEAT_Debugv8p9 arm64/hw_breakpoint: Enable FEAT_Debugv8p9 Documentation/arch/arm64/booting.rst | 19 ++++++++++ arch/arm64/include/asm/debug-monitors.h | 1 + arch/arm64/include/asm/el2_setup.h | 27 +++++++++++++ arch/arm64/include/asm/hw_breakpoint.h | 50 ++++++++++++++++++++----- arch/arm64/include/asm/kvm_arm.h | 1 + arch/arm64/kernel/cpufeature.c | 21 ++++++++--- arch/arm64/kernel/debug-monitors.c | 16 ++++++-- arch/arm64/kernel/hw_breakpoint.c | 33 ++++++++++++++++ 8 files changed, 149 insertions(+), 19 deletions(-)