From patchwork Wed Oct 2 10:47:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13819601 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EA2D0CF31AF for ; Wed, 2 Oct 2024 10:50:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=ObWNFdadKhdUme8W58JWf87Bq2PlWG91qnZBCZr4PMU=; b=v2U0jzOkCIQC/RjXAtxh0neXJ5 042JzjJWZ6929HhGa4xiAZvYLQRfgM6T9V7sS5nH5POkEVdsuMyGkIucXXHaGA4TYqmCM4Wi4e4Ne bZhODsOMyw3M+wu30Y37jAjaLVXvfvBWva7pyqTWMv/hCMW12R95Vcp3/Duo9zrIdApbmneFU+8mz XRFInMNNPRdcWUJx/ObpmDJCIE7GxYuKJ+CBTlyd0thYiHl2UQe7gMmzy7V8zDSiLsPRecjE2BueU tbql2K+gGdL/SFb5h3JdSFeDxWzvq9cuV4vntxQ3TQfhkCuMdp0k3koQXQ/IXB790OyJeTZmdbN48 SW85aF3A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1svwva-00000005YEm-0uJY; Wed, 02 Oct 2024 10:49:54 +0000 Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1svwtw-00000005Xlm-0rjV; Wed, 02 Oct 2024 10:48:13 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id B4579A439DF; Wed, 2 Oct 2024 10:48:02 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 239F7C4CEC5; Wed, 2 Oct 2024 10:48:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1727866090; bh=X7o2wPuerOGCcKjMyOjYiFvGvskMQv5ZlFx2sUQSTyE=; h=From:To:Cc:Subject:Date:From; b=J+tKaBe++f7MI+YEFi9xRXJVacjUy4gpilwcIWVBCjk0e9Qu280vFYNxNwbzb80RQ rAIS1/BTmlc1ORtGfjCOBn41SKKR3ObPBIuUWN8AUfIul5DuRAg2WqxuyFxDGazn3S Ibaf8ngjEd2S+WjdC6KE2VIwYFLGGvYXxSVYrjiUOSGk5s2/ynMOiWqfL/QPElIL81 DabU3tCrfoptb4QzFD0t7/AP5OZbUSgRm/9VLjBcv/Pxs0p598hQZRKq6ZEAS/v70f dPttqa2I3YJkIJ4dbvySE8oNGeiR6Y3MzoBkjsbED9ccnWN5hhfNtQb486bEh6xOng bM19qJfjPRLXQ== From: Conor Dooley To: linux-kernel@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Daire McNamara , pierre-henry.moussay@microchip.com, valentina.fernandezalanis@microchip.com, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Jassi Brar , Lee Jones , Paul Walmsley , Palmer Dabbelt , Albert Ou , Neil Armstrong , Jerome Brunet , Kevin Hilman , Martin Blumenstingl , Philipp Zabel , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v1 00/11] Redo PolarFire SoC's mailbox/clock devicestrees and related code Date: Wed, 2 Oct 2024 11:47:58 +0100 Message-ID: <20241002-private-unequal-33cfa6101338@spud> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7614; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=ILkJ4IDwKOG9OkiAKoHGKyrbz7aqasANdjxvroygF3c=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDGl/Ve7fWKHz7dmhqS3/ra7fmFY3m+fNok+lEsZuz37b+ 89hbzDo7yhlYRDjYJAVU2RJvN3XIrX+j8sO5563MHNYmUCGMHBxCsBETC4zMiw+d3qtgnWK343M TOsD2m02RTlHWow3bWv43HzXpeb8JhFGhi8rThdIPGi0Xb/nLfvpyWbMe2PlGl9OmrtqWT+/m+L Cy+wA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241002_034812_404287_87EA260B X-CRM114-Status: GOOD ( 28.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Conor Dooley Yo, Here's something that I've been mulling over for a while, since I started to understand how devicetree stuff was "meant" to be done. There'd been little reason to actually press forward with it, because it is fairly disruptive. I've finally opted to do it, because a user has come along with a hwmon driver that needs to access the same register region as the mailbox and the author is not keen on using the aux bus, and because I do not want the new pic64gx SoC that's based on PolarFire SoC to use bindings etc that I know to be incorrect. Given backwards compatibility needs to be maintained, this patch series isn't the prettiest thing I have ever written. The reset driver needs to retain support for the auxiliary bus, which looks a bit mess, but not much can be done there. The mailbox and clock drivers both have to have an "old probe" function to handle the old layout. Thankfully in the clock driver, the Meson clk-regmap support can be used to identically handle both old and new devicetree formats - but using a regmap in the mailbox driver was only really possible for the new format, so the code there is unfortunately a bit of an if/else mess that I'm both not proud of, nor really sure is worth "improving". The series should be pretty splitable per subsystem, only the dts change has some sort of dependency, but I'll not be applying that till everything else is in Linus' tree, so that's not a big deal. I've got all the Meson clock folks on CC, given I am moving their clk-regmap implementation to common code. There were one or two things I didn't really like about the implementation, but it is better than the Qualcomm one IMO and creating a third copy of clk-regmap is certainly not an improvement on having two copies! I don't really want this stuff in stable, hence a lack of cc: stable anywhere here, since what's currently in the tree works fine for the currently supported hardware. AFAIK, the only other project affected here is U-Boot - I've got some WIP work that I need to rebase and send for it before the dts patches here will be applied: https://github.com/ConchuOD/u-boot/commits/syscon-clocks/ I previously submitted this as an RFC, only to Lee and the dt list, in order to get some feedback on the syscon/mfd bindings: https://lore.kernel.org/all/20240815-shindig-bunny-fd42792d638a@spud/ I'm not really going to bother with a proper changelog, since that was submitted with lots of WIP code to get answers to some questions. The main change was "removing" some of the child nodes of the syscons. Cheers, Conor. CC: Conor Dooley CC: Daire McNamara CC: pierre-henry.moussay@microchip.com CC: valentina.fernandezalanis@microchip.com CC: Michael Turquette CC: Stephen Boyd CC: Rob Herring CC: Krzysztof Kozlowski CC: Jassi Brar CC: Lee Jones CC: Paul Walmsley CC: Palmer Dabbelt CC: Albert Ou CC: Neil Armstrong CC: Jerome Brunet CC: Kevin Hilman CC: Martin Blumenstingl CC: Philipp Zabel CC: linux-riscv@lists.infradead.org CC: linux-clk@vger.kernel.org CC: devicetree@vger.kernel.org CC: linux-kernel@vger.kernel.org CC: linux-amlogic@lists.infradead.org CC: linux-arm-kernel@lists.infradead.org Conor Dooley (11): dt-bindings: mailbox: mpfs: fix reg properties mailbox: mpfs: support new, syscon based, devicetree configuration dt-bindings: mfd: syscon document the non simple-mfd syscon on PolarFire SoC dt-bindings: soc: microchip: document the two simple-mfd syscons on PolarFire SoC soc: microchip: add mfd drivers for two syscon regions on PolarFire SoC reset: mpfs: add non-auxiliary bus probing dt-bindings: clk: microchip: mpfs: remove first reg region clk: move meson clk-regmap implementation to common code clk: microchip: mpfs: use regmap clock types riscv: dts: microchip: fix mailbox description riscv: dts: microchip: convert clock and reset to use syscon .../bindings/clock/microchip,mpfs-clkcfg.yaml | 36 +++--- .../mailbox/microchip,mpfs-mailbox.yaml | 13 +- .../devicetree/bindings/mfd/syscon.yaml | 2 + .../microchip/microchip,mpfs-control-scb.yaml | 44 +++++++ .../microchip,mpfs-mss-top-sysreg.yaml | 54 +++++++++ arch/riscv/boot/dts/microchip/mpfs.dtsi | 34 ++++-- drivers/clk/Kconfig | 4 + drivers/clk/Makefile | 1 + drivers/clk/{meson => }/clk-regmap.c | 2 +- drivers/clk/meson/Kconfig | 46 ++++--- drivers/clk/meson/Makefile | 1 - drivers/clk/meson/a1-peripherals.c | 2 +- drivers/clk/meson/a1-pll.c | 2 +- drivers/clk/meson/axg-aoclk.c | 2 +- drivers/clk/meson/axg-audio.c | 2 +- drivers/clk/meson/axg.c | 2 +- drivers/clk/meson/c3-peripherals.c | 2 +- drivers/clk/meson/c3-pll.c | 2 +- drivers/clk/meson/clk-cpu-dyndiv.c | 2 +- drivers/clk/meson/clk-dualdiv.c | 2 +- drivers/clk/meson/clk-mpll.c | 2 +- drivers/clk/meson/clk-phase.c | 2 +- drivers/clk/meson/clk-pll.c | 2 +- drivers/clk/meson/g12a-aoclk.c | 2 +- drivers/clk/meson/g12a.c | 2 +- drivers/clk/meson/gxbb-aoclk.c | 2 +- drivers/clk/meson/gxbb.c | 2 +- drivers/clk/meson/meson-aoclk.h | 2 +- drivers/clk/meson/meson-eeclk.c | 2 +- drivers/clk/meson/meson-eeclk.h | 2 +- drivers/clk/meson/meson8-ddr.c | 2 +- drivers/clk/meson/meson8b.c | 2 +- drivers/clk/meson/s4-peripherals.c | 2 +- drivers/clk/meson/s4-pll.c | 2 +- drivers/clk/meson/sclk-div.c | 2 +- drivers/clk/meson/vclk.h | 2 +- drivers/clk/meson/vid-pll-div.c | 2 +- drivers/clk/microchip/Kconfig | 3 + drivers/clk/microchip/clk-mpfs.c | 114 +++++++++++++----- drivers/mailbox/Kconfig | 1 + drivers/mailbox/mailbox-mpfs.c | 87 ++++++++++--- drivers/reset/reset-mpfs.c | 83 +++++++++++-- drivers/soc/microchip/Kconfig | 13 ++ drivers/soc/microchip/Makefile | 1 + drivers/soc/microchip/mpfs-control-scb.c | 45 +++++++ drivers/soc/microchip/mpfs-mss-top-sysreg.c | 48 ++++++++ .../meson => include/linux/clk}/clk-regmap.h | 0 47 files changed, 541 insertions(+), 143 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-control-scb.yaml create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml rename drivers/clk/{meson => }/clk-regmap.c (99%) create mode 100644 drivers/soc/microchip/mpfs-control-scb.c create mode 100644 drivers/soc/microchip/mpfs-mss-top-sysreg.c rename {drivers/clk/meson => include/linux/clk}/clk-regmap.h (100%)