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AJvYcCWDkP/pLzr100bNLmdxH+qc8TjwlXP4cOd0M9G09+lDo/kO+tkUbwDuK9udzHMp6mYXLoKTmhHipyO59FR+LrLF@lists.infradead.org X-Gm-Message-State: AOJu0YxI9vXp6oyh4Qnn455UgF5Ni1bXgSeWA2fS9e49kZoI2yLlyK/d GKQkZLYUYb9FiYzEMHGxcAa6EIfWL47mxmSP9DFQc8zKEE0ohHWZq/+ZLTnQLz0= X-Google-Smtp-Source: AGHT+IGhYj/A27bQGsUEOm42j2NO+1J21Z92LR4K77UI/ry3eizF8aKxTBJVM0F6v5v89gUQbiJYYA== X-Received: by 2002:a5d:4603:0:b0:374:c3cd:73de with SMTP id ffacd0b85a97d-37cfb9d4418mr3809189f8f.35.1727900171931; Wed, 02 Oct 2024 13:16:11 -0700 (PDT) Received: from gpeter-l.lan ([145.224.66.77]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37cd564d2e8sm14850600f8f.18.2024.10.02.13.16.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Oct 2024 13:16:11 -0700 (PDT) From: Peter Griffin To: vkoul@kernel.org, kishon@kernel.org, krzysztof.kozlowski@linaro.org, alim.akhtar@samsung.com Cc: tudor.ambarus@linaro.org, andre.draszik@linaro.org, kernel-team@android.com, willmcvicker@google.com, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, Peter Griffin Subject: [PATCH 0/3] Add phy support for hibern8 enter & exit on gs101 Date: Wed, 2 Oct 2024 21:15:52 +0100 Message-ID: <20241002201555.3332138-1-peter.griffin@linaro.org> X-Mailer: git-send-email 2.46.1.824.gd892dcdcdd-goog MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241002_131614_298347_7FC8648D X-CRM114-Status: GOOD ( 12.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Vinod, This series adds two new phy modes to support UFS HIBERN8_ENTER and HIBERN8_EXIT. This is used for UFS phys that need to program specific values when entering and exiting from ufs hibern8 state. Once such platform that needs to do this is gs101 SoC found on Pixel 6. phy-gs101-ufs is also updated to include these hibern8 enter/exit specific tuning values. Note: a separate series will be sent for ufs-exynos driver that makes use of this new UFS phy functionality. regards, Peter Peter Griffin (3): phy: Add UFS phy hibernate modes phy: samsung-ufs: add support for HIBERN8_ENTER and HIBERN8_EXIT phy: samsung: gs101-ufs: Add hibern8 enter and exit specific tuning values drivers/phy/samsung/phy-gs101-ufs.c | 31 ++++++++++++++++++++++++--- drivers/phy/samsung/phy-samsung-ufs.c | 18 ++++++++++++++-- drivers/phy/samsung/phy-samsung-ufs.h | 2 ++ include/linux/phy/phy.h | 4 +++- 4 files changed, 49 insertions(+), 6 deletions(-)