From patchwork Wed Oct 16 08:04:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gatien CHEVALLIER X-Patchwork-Id: 13837914 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1017DD1AD29 for ; Wed, 16 Oct 2024 08:26:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To: Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=jkUgw4lFb6dzmWnsWacZxrxZH1PIAFIkAz1dcBQJTJk=; b=FPib/lq5pCnV6L oZd+lQGgNq7DtXSDchWS5LbzQiVdrETn7+pt/4hwdixUfD53KFh83XtY01bB3RD1/dg1cZwD01xT/ IJ1kF6fw7ad1K4DbCsVP8HmX/ZNfqTCk/9WHUl0TbSPlZDhNRtE1hY9O47q3+a/ppXfyW2esj6PIw 5XO40/Oy/0cY1/Ukhr+e0mYTcMZCqLtLK8Pkal+q6mqNAWW7CiLaq+sOpdDwqVxMPj9KtN7iMw0lX g0OouE1Vhw09+m7iHZj9TPXwDNr9VHNw4QA4KPO3bAyPEp9vI23v42xY3j0iSa2F4QRgnFxA1tYvU nW2/AMiYGhZ07alJjbsQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t0zMZ-0000000B1K9-3oi7; Wed, 16 Oct 2024 08:26:35 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t0z3E-0000000Awtd-0Fw8 for linux-arm-kernel@lists.infradead.org; Wed, 16 Oct 2024 08:06:39 +0000 Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49G3vNF3018119; Wed, 16 Oct 2024 10:06:26 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:message-id :mime-version:subject:to; s=selector1; bh=jkUgw4lFb6dzmWnsWacZxr xZH1PIAFIkAz1dcBQJTJk=; b=f3umWwBPVWdTXKzCJ1HJ0tj8ydR5NSQqsj/vX3 r0teK9QssdobqakfLXaGaA56Bu6Vyr6HvxnudJ4EBWhXlknuBimAe9fq32Q8NdIE ARe3rkgUNY0jV8fp8F8RMXn8uG+mIyhKuZccmJI8OhzqpwDmcqwM3Dc0cfQQ3SrI VVCI26aIXB9u0YzvGsq+lbdVetgiSvmRNke6ai6ke0fp95cmBXuoDEqr/WznWjsz VDaoBCS5Y4xkmqvtDsXooE5bKWDPccK/mbP7ozE/97fJ2ovk38/5WxDxXwanVHGg b6uSL90No1grOrRQESZliA2s00J+NEc+VZSm3D1X2Mx2Ecig== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 42842jechh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 16 Oct 2024 10:06:26 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D128640048; Wed, 16 Oct 2024 10:05:17 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 2A0C823CB49; Wed, 16 Oct 2024 10:04:32 +0200 (CEST) Received: from localhost (10.48.86.225) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Wed, 16 Oct 2024 10:04:31 +0200 From: Gatien Chevallier Subject: [PATCH v4 0/4] Add support for stm32mp25x RNG Date: Wed, 16 Oct 2024 10:04:17 +0200 Message-ID: <20241016-rng-mp25-v2-v4-0-5dca590cb092@foss.st.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAIFzD2cC/22MQQqDMBBFr1Jm3cgk0US66j1KF1UnmoVGMhJax Ls3uqpQ+Jv34b0VmKInhttlhUjJsw9ThvJ6gXZ4TT0J32UGhaqUKKWIUy/GWVUiKdGY0iA5KUk 6yMYcyfn3UXs8Mw+elxA/Rzyp/f3fyUNhjeuMtKhqbO8uMBe8FG0YYS8l/WtXZ1tnu7ZGY2c1V dSc7W3bvpuHZw/mAAAA X-Change-ID: 20241011-rng-mp25-v2-b6460ef11e1f To: Olivia Mackall , Herbert Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Lionel Debieve , CC: , , , , , Gatien Chevallier X-Mailer: b4 0.14.2 X-Originating-IP: [10.48.86.225] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241016_010636_472993_1ACC1773 X-CRM114-Status: GOOD ( 10.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patchset adds support for the Random Number Generator(RNG) present on the stm32mp25x platforms. On these platforms, the clock management and the RNG parameters are different. While there, update the RNG max clock frequency on stm32mp15 platforms according to the latest specs. Tested on the stm32mp257f-ev1 platform with a deep power sequence with rngtest before/after the sequence with satisfying results. Same was done on stm32mp135f-dk to make sure no regression was added. On stm32mp157c-dk2, I didn't perform a power sequence but the rngtest results were satisfying. Signed-off-by: Gatien Chevallier --- Changes in v4: - Changed the restrictions on clock names per compatible - Link to v3: https://lore.kernel.org/r/20241015-rng-mp25-v2-v3-0-87630d73e5eb@foss.st.com Changes in v3: - Add restriction on clock-names some compatibles - Use clk_bulk APIs in the RNG driver to avoid manually handling clocks. - Link to v2: https://lore.kernel.org/r/20241011-rng-mp25-v2-v2-0-76fd6170280c@foss.st.com Changes in V2: -Fixes in bindings -Removed MP25 RNG example -Renamed RNG clocks for mp25 to "core" and "bus" --- Gatien Chevallier (4): dt-bindings: rng: add st,stm32mp25-rng support hwrng: stm32 - implement support for STM32MP25x platforms hwrng: stm32 - update STM32MP15 RNG max clock frequency arm64: dts: st: add RNG node on stm32mp251 .../devicetree/bindings/rng/st,stm32-rng.yaml | 28 +++++++- arch/arm64/boot/dts/st/stm32mp251.dtsi | 10 +++ drivers/char/hw_random/stm32-rng.c | 76 ++++++++++++++++------ 3 files changed, 94 insertions(+), 20 deletions(-) --- base-commit: 8e929cb546ee42c9a61d24fae60605e9e3192354 change-id: 20241011-rng-mp25-v2-b6460ef11e1f Best regards,