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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-7fbcc1e2490sm5698557a12.31.2024.11.24.21.25.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 24 Nov 2024 21:25:29 -0800 (PST) From: Hui-Ping Chen To: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, nikita.shubin@maquefel.me, arnd@arndb.de, vkoul@kernel.org, esben@geanix.com Cc: linux-arm-kernel@lists.infradead.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Hui-Ping Chen Subject: [PATCH v9 0/2] Add support for nuvoton ma35 nand controller Date: Mon, 25 Nov 2024 05:25:22 +0000 Message-Id: <20241125052524.135362-1-hpchen0nvt@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241124_212531_579361_D2F4FBDD X-CRM114-Status: GOOD ( 14.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch series adds the mtd nand driver for the nuvoton ma35 ARMv8 SoC. It includes DT binding documentation and the ma35 mtd nand driver. v9: - Update ma35d1 mtd nand driver - Remove NAND_NO_SUBPAGE_WRITE flag. - Remove of_get_property(). - Add ecc.write_subpage and ecc.read_subpage. v8: - Update ma35d1 mtd nand driver - Rename to nuvoton-ma35d1-nand-controller.c. - Use switch case instead of if else. - Move some parameters to be set during initialization. - Fix the ecc.read_page return value issue. - Add enable/disable ECC engine before and after reading/writing the page. - Return IRQ_NONE if (isr & INT_DMA) == 0. - Move the HW ECC related settings to ON_HOST. - Move hw_init() to probe. v7: - Update nuvoton,ma35d1-nand.yaml - Remove required 'nand-ecc-step-size' and 'nand-ecc-strength'. - Add 'reg' for chip select. - Update ma35d1 mtd nand driver - Update space and comments style. - Add chip select setting from DT. - Add switch case which supports various ECC configurations. - Set reset before NAND controller enable. v6: - Update ma35d1 mtd nand driver - Remove extra blank lines and add comments. v5: - Update ma35d1 mtd nand driver - Remove unnecessary definitions and comments. - Modified DMA API call sequence. - Move the ECC check out of the interrupt handler. Check it after reading a page. v4: - Update nuvoton,ma35d1-nand.yaml - rename 'nuvoton,ma35d1-nand' to 'nuvoton,ma35d1-nand-controller'. - Update ma35d1 mtd nand driver - Rewrite the NAND driver using the exec_op API. v3: - Update ma35d1 mtd nand driver - Release IRQ handler. - Remove unused functions. - Remove '.owner'. v2: - Update nuvoton,ma35d1-nand.yaml - Adjust the order and remove any unnecessary items. - Add 'nand-ecc-step-size' and 'nand-ecc-strength' to the required list. - Update ma35d1 mtd nand driver - Fix coding style. - Use 'devm_clk_get' instead of 'of_clk_get'. - Use 'dev_err_probe' instead of 'dev_err'. - Remove 'pr_info' and 'of_match_ptr'. - Remove 'module_init' and 'module_exit'. Hui-Ping Chen (2): dt-bindings: mtd: nuvoton,ma35d1-nand: add new bindings mtd: rawnand: nuvoton: add new driver for the Nuvoton MA35 SoC .../bindings/mtd/nuvoton,ma35d1-nand.yaml | 95 ++ drivers/mtd/nand/raw/Kconfig | 8 + drivers/mtd/nand/raw/Makefile | 1 + .../nand/raw/nuvoton-ma35d1-nand-controller.c | 1024 +++++++++++++++++ 4 files changed, 1128 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml create mode 100644 drivers/mtd/nand/raw/nuvoton-ma35d1-nand-controller.c