From patchwork Tue Jan 7 16:07:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13929274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 673B5E77197 for ; Tue, 7 Jan 2025 16:10:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=i75bBMN9BqnJJWQCaZZhJUmdx0HHa8tRuO+mzs6+heM=; b=34+0hh5ue9Q1Oi6J8tZjZTx1w5 eiLt3zFBs7/b7HsoYm/98rq2Bsdbh4Nb9MPvdYBqTBRBEz8V9n7gYNPKuFBbB5GT19EUA1eV/sx3K /WFq81kAH8yrF5Jsw5Inn5YRvJ7f/d0k3heU2wyfZ5b4eKRiY/f6dmLxAZE3oNJy/hhuUGHEM0EsA 5mVIKdFzo1XCCkrUHNIF71uruC4TCQMWxSYDBV1s19F2x+cKQRaE5DLpjjqzO2MXWf8B2O+faS6CD cf/9S6SsQAAPULmu/1WfOL2FIftdS8aFFyC6Itfob0mz6yNpkWWI8jgG2xn/NG/Czs47uaV8kJY9o Er8k/N2w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tVC9I-00000005YwU-0m2D; Tue, 07 Jan 2025 16:09:44 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tVC83-00000005Yh4-1v5H for linux-arm-kernel@lists.infradead.org; Tue, 07 Jan 2025 16:08:31 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1736266107; x=1767802107; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=hXz07YNeytmjgCcuOsFJXI6AMOoGwgYaHhgrjG0nUbU=; b=pc+urSNMxgneLVXh7pkeUe5q9AY2QPvba+LCljYw5RDkkzFXz4TFPogP DA94GH1n9SO6B6Ogd3IBms3JGfCYa6heNNoR2ZbL9j7nwcvVxl9kjrRC8 3/gVYGNHaL92UO4ZbZ3uQkcmSIbHZb0AuPdjd8rDydCM/p7sLBFEYC3y0 awRD8umQquE8yT7SQbKX4LZGPia5mWBw4WQ1JixwaW/UE0no+RBc9p5cz 3v8gzUBYmPSL7Ap6/uJT0wz2QeuZmZ2OOIFJGWmrCGw2ADUykq2zNQhVV /MCG90+V6FtZ6jTae54ndCX1I74l7dqeBTt2m/RXEtNIKrizpYsWPbjJ7 g==; X-CSE-ConnectionGUID: lqpfnJzJQpCXzb9QKpQeRA== X-CSE-MsgGUID: OWRa46htQ1Od4ovM8pN2Ig== X-IronPort-AV: E=Sophos;i="6.12,296,1728975600"; d="scan'208";a="40091246" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 07 Jan 2025 09:08:24 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 7 Jan 2025 09:08:17 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 7 Jan 2025 09:08:17 -0700 From: To: , , , , , , , , CC: , , , , , , , , , , , , Ryan Wanner Subject: [PATCH v5 0/5] Add support for SAMA7D65 Date: Tue, 7 Jan 2025 09:07:22 -0700 Message-ID: <20250107160850.120537-1-Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250107_080827_628962_57817EC8 X-CRM114-Status: GOOD ( 18.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner This series adds support for the SAMA7D65 SoC. V2 of this series [1]. V3 of this series [2]. V4 of this series [4]. For the pinctrl and pit64 timers those will have DTB warnings due to those bindings not being in the .yaml format. Changes v1->v2: - V1 set was sent incorrectly as multiple seprate patches v2 took all those patches and put them in 1 thread. Changes v2->v3: - Correct the patch order to follow correct practice. - Correct flexcom dt-binding commit messge to reflect the changes in the coding style. - Add missing SoB tags to patches. - Moved export clocks to DT patch to be included with the clock binding patch. - Separate Kconfig changes and defconfig changes into different patches and removed unused Kconfig params. - Correct confusing SoB and Co-developed chain. - Removed unsued nodes in DTSI file and sorted includes alphanumerically. - Fix incorrect dts formatting. - Separate dts and pinmux changes into two patches. - Combine PLL and MCK changes into core clock driver patch. - Correct formatting in main clock driver. - MMC dt-binding changes are applied for next so have been removed from the set [3]. Changes v3->v4: - Collect all tags from maintainers. - Correct compile error on 11/13 and correct location of vendor specific properties. - Add USB and UTMI selections to 12/13 to prevent compile errors due to functions in the clock driver that use the USB clock system. - Add "microchip,sama7g5-pinctrl" compatible string as a fall back in 9/13. - Add missing kfree() to 8/13 to correctly handle error case. - Replace bad spacing with correct tab formatting on 7/13. Changes from v4->v5: - Remove patches that have been applied [5]. - Update pinctrl dt-binding to use fallback formatting. Note: - For the SDHCI DTB error that patch has been removed do to it being applied see [3]. - There are DTB errors on microchip,sama7d65-pit64b and microchip,sama7d65-pinctrl, this is due to those bindings being .txt files. 1) https://lore.kernel.org/linux-arm-kernel/cover.1732030972.git.Ryan.Wanner@microchip.com/T/#m9691b4d58b62f36f6cbac1d06883c985766c2c0d 2) https://lore.kernel.org/linux-arm-kernel/cover.1733505542.git.Ryan.Wanner@microchip.com/T/#m3b52978236907198f727424e69ef21c8898e95c8 3) https://lore.kernel.org/linux-arm-kernel/cover.1732030972.git.Ryan.Wanner@microchip.com/T/#mccf6521c07e74e1c7dc61b09ae0ebdbbdde73a28 4) https://lore.kernel.org/linux-arm-kernel/70d429086fd8e858d79ca2824ad8cc4a09e3fe5d.1734723585.git.Ryan.Wanner@microchip.com/T/#m918b8db23c8d30981263846a02dafc085e17de14 5) https://lore.kernel.org/linux-arm-kernel/70d429086fd8e858d79ca2824ad8cc4a09e3fe5d.1734723585.git.Ryan.Wanner@microchip.com/T/#m69b8f11536e3b0ca3d69d125d0670c90412d4317 Dharma Balasubiramani (2): dt-bindings: serial: atmel,at91-usart: add microchip,sama7d65-usart dt-bindings: pinctrl: at91-pio4: add microchip,sama7d65-pinctrl Romain Sioen (2): dt-bindings: ARM: at91: Document Microchip SAMA7D65 Curiosity ARM: dts: microchip: add support for sama7d65_curiosity board Ryan Wanner (1): ARM: dts: microchip: add sama7d65 SoC DT .../devicetree/bindings/arm/atmel-at91.yaml | 7 + .../pinctrl/atmel,at91-pio4-pinctrl.txt | 3 +- .../bindings/serial/atmel,at91-usart.yaml | 1 + arch/arm/boot/dts/microchip/Makefile | 3 + .../dts/microchip/at91-sama7d65_curiosity.dts | 89 +++++++++++ arch/arm/boot/dts/microchip/sama7d65.dtsi | 145 ++++++++++++++++++ 6 files changed, 247 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/microchip/at91-sama7d65_curiosity.dts create mode 100644 arch/arm/boot/dts/microchip/sama7d65.dtsi